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mmc: sdhci-brcmstb: add hs400_downgrade callback for bcm2712
The attached PHY performs parameter validation, so the switch from HS200 to HS (before selecting HS400/HS400es) with a 200MHz clock fails to update pad timings and results in CRC errors from the card. Underclocking the interface is safe, so do that in the downgrade callback. Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
This commit is contained in:
committed by
Dom Cobley
parent
feaee47233
commit
0704ca65f6
@@ -243,6 +243,20 @@ static void sdhci_brcmstb_set_uhs_signaling(struct sdhci_host *host,
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sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
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sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
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}
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}
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static void sdhci_bcm2712_hs400_downgrade(struct mmc_host *mmc)
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{
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struct sdhci_host *host = mmc_priv(mmc);
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/*
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* The eMMC PHY and its internal controller parses and validates
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* the uhs_mode, divisor, pin_sel, and sampling clock select
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* output from the SD controller. It will refuse to update its
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* config if HS timings are selected while the clock is >52MHz.
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* so bump the clock down now before card/controller setup is
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* performed.
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*/
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sdhci_bcm2712_set_clock(host, 52000000);
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}
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static void sdhci_brcmstb_cfginit_2712(struct sdhci_host *host)
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static void sdhci_brcmstb_cfginit_2712(struct sdhci_host *host)
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{
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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@@ -262,6 +276,8 @@ static void sdhci_brcmstb_cfginit_2712(struct sdhci_host *host)
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reg &= ~SDIO_CFG_MAX_50MHZ_MODE_ENABLE;
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reg &= ~SDIO_CFG_MAX_50MHZ_MODE_ENABLE;
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reg |= SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE;
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reg |= SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE;
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writel(reg, brcmstb_priv->cfg_regs + SDIO_CFG_MAX_50MHZ_MODE);
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writel(reg, brcmstb_priv->cfg_regs + SDIO_CFG_MAX_50MHZ_MODE);
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host->mmc_host_ops.hs400_downgrade = sdhci_bcm2712_hs400_downgrade;
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}
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}
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if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) ||
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if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) ||
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