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Merge branch 'topic/pm-convert' into for-next

Browse Source 
This merges the changes for converting to new PM ops for platform
and some other drivers.
Also move some header files to local places from the public
include/sound.
This commit is contained in:
Takashi Iwai
2012-07-19 08:21:40 +02:00
parent 4609ed6b1f 81fcb17085
commit 1558eb838f
83 changed files with 602 additions and 410 deletions
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1745
include/sound/cs46xx.h
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include/sound/cs46xx_dsp_scb_types.h
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include/sound/cs46xx_dsp_spos.h
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/*
* The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef __CS46XX_DSP_SPOS_H__
#define __CS46XX_DSP_SPOS_H__
#include "cs46xx_dsp_scb_types.h"
#include "cs46xx_dsp_task_types.h"
#define SYMBOL_CONSTANT 0x0
#define SYMBOL_SAMPLE 0x1
#define SYMBOL_PARAMETER 0x2
#define SYMBOL_CODE 0x3
#define SEGTYPE_SP_PROGRAM 0x00000001
#define SEGTYPE_SP_PARAMETER 0x00000002
#define SEGTYPE_SP_SAMPLE 0x00000003
#define SEGTYPE_SP_COEFFICIENT 0x00000004
#define DSP_SPOS_UU 0x0deadul /* unused */
#define DSP_SPOS_DC 0x0badul /* don't care */
#define DSP_SPOS_DC_DC 0x0bad0badul /* don't care */
#define DSP_SPOS_UUUU 0xdeadc0edul /* unused */
#define DSP_SPOS_UUHI 0xdeadul
#define DSP_SPOS_UULO 0xc0edul
#define DSP_SPOS_DCDC 0x0badf1d0ul /* don't care */
#define DSP_SPOS_DCDCHI 0x0badul
#define DSP_SPOS_DCDCLO 0xf1d0ul
#define DSP_MAX_TASK_NAME 60
#define DSP_MAX_SYMBOL_NAME 100
#define DSP_MAX_SCB_NAME 60
#define DSP_MAX_SCB_DESC 200
#define DSP_MAX_TASK_DESC 50
#define DSP_MAX_PCM_CHANNELS 32
#define DSP_MAX_SRC_NR 14
#define DSP_PCM_MAIN_CHANNEL 1
#define DSP_PCM_REAR_CHANNEL 2
#define DSP_PCM_CENTER_LFE_CHANNEL 3
#define DSP_PCM_S71_CHANNEL 4 /* surround 7.1 */
#define DSP_IEC958_CHANNEL 5
#define DSP_SPDIF_STATUS_OUTPUT_ENABLED 1
#define DSP_SPDIF_STATUS_PLAYBACK_OPEN 2
#define DSP_SPDIF_STATUS_HW_ENABLED 4
#define DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED 8
struct dsp_symbol_entry {
u32 address;
char symbol_name[DSP_MAX_SYMBOL_NAME];
int symbol_type;
/* initialized by driver */
struct dsp_module_desc * module;
int deleted;
};
struct dsp_symbol_desc {
int nsymbols;
struct dsp_symbol_entry *symbols;
/* initialized by driver */
int highest_frag_index;
};
struct dsp_segment_desc {
int segment_type;
u32 offset;
u32 size;
u32 * data;
};
struct dsp_module_desc {
char * module_name;
struct dsp_symbol_desc symbol_table;
int nsegments;
struct dsp_segment_desc * segments;
/* initialized by driver */
u32 overlay_begin_address;
u32 load_address;
int nfixups;
};
struct dsp_scb_descriptor {
char scb_name[DSP_MAX_SCB_NAME];
u32 address;
int index;
u32 *data;
struct dsp_scb_descriptor * sub_list_ptr;
struct dsp_scb_descriptor * next_scb_ptr;
struct dsp_scb_descriptor * parent_scb_ptr;
struct dsp_symbol_entry * task_entry;
struct dsp_symbol_entry * scb_symbol;
struct snd_info_entry *proc_info;
int ref_count;
u16 volume[2];
unsigned int deleted :1;
unsigned int updated :1;
unsigned int volume_set :1;
};
struct dsp_task_descriptor {
char task_name[DSP_MAX_TASK_NAME];
int size;
u32 address;
int index;
u32 *data;
};
struct dsp_pcm_channel_descriptor {
int active;
int src_slot;
int pcm_slot;
u32 sample_rate;
u32 unlinked;
struct dsp_scb_descriptor * pcm_reader_scb;
struct dsp_scb_descriptor * src_scb;
struct dsp_scb_descriptor * mixer_scb;
void * private_data;
};
struct dsp_spos_instance {
struct dsp_symbol_desc symbol_table; /* currently available loaded symbols in SP */
int nmodules;
struct dsp_module_desc * modules; /* modules loaded into SP */
struct dsp_segment_desc code;
/* Main PCM playback mixer */
struct dsp_scb_descriptor * master_mix_scb;
u16 dac_volume_right;
u16 dac_volume_left;
/* Rear/surround PCM playback mixer */
struct dsp_scb_descriptor * rear_mix_scb;
/* Center/LFE mixer */
struct dsp_scb_descriptor * center_lfe_mix_scb;
int npcm_channels;
int nsrc_scb;
struct dsp_pcm_channel_descriptor pcm_channels[DSP_MAX_PCM_CHANNELS];
int src_scb_slots[DSP_MAX_SRC_NR];
/* cache this symbols */
struct dsp_symbol_entry * null_algorithm; /* used by PCMreaderSCB's */
struct dsp_symbol_entry * s16_up; /* used by SRCtaskSCB's */
/* proc fs */
struct snd_card *snd_card;
struct snd_info_entry * proc_dsp_dir;
struct snd_info_entry * proc_sym_info_entry;
struct snd_info_entry * proc_modules_info_entry;
struct snd_info_entry * proc_parameter_dump_info_entry;
struct snd_info_entry * proc_sample_dump_info_entry;
/* SCB's descriptors */
int nscb;
int scb_highest_frag_index;
struct dsp_scb_descriptor scbs[DSP_MAX_SCB_DESC];
struct snd_info_entry * proc_scb_info_entry;
struct dsp_scb_descriptor * the_null_scb;
/* Task's descriptors */
int ntask;
struct dsp_task_descriptor tasks[DSP_MAX_TASK_DESC];
struct snd_info_entry * proc_task_info_entry;
/* SPDIF status */
int spdif_status_out;
int spdif_status_in;
u16 spdif_input_volume_right;
u16 spdif_input_volume_left;
/* spdif channel status,
left right and user validity bits */
unsigned int spdif_csuv_default;
unsigned int spdif_csuv_stream;
/* SPDIF input sample rate converter */
struct dsp_scb_descriptor * spdif_in_src;
/* SPDIF input asynch. receiver */
struct dsp_scb_descriptor * asynch_rx_scb;
/* Capture record mixer SCB */
struct dsp_scb_descriptor * record_mixer_scb;
/* CODEC input SCB */
struct dsp_scb_descriptor * codec_in_scb;
/* reference snooper */
struct dsp_scb_descriptor * ref_snoop_scb;
/* SPDIF output PCM reference */
struct dsp_scb_descriptor * spdif_pcm_input_scb;
/* asynch TX task */
struct dsp_scb_descriptor * asynch_tx_scb;
/* record sources */
struct dsp_scb_descriptor * pcm_input;
struct dsp_scb_descriptor * adc_input;
int spdif_in_sample_rate;
};
#endif /* __DSP_SPOS_H__ */

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include/sound/cs46xx_dsp_task_types.h
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/*
* The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*
* NOTE: comments are copy/paste from cwcemb80.lst
* provided by Tom Woller at Cirrus (my only
* documentation about the SP OS running inside
* the DSP)
*/
#ifndef __CS46XX_DSP_TASK_TYPES_H__
#define __CS46XX_DSP_TASK_TYPES_H__
#include "cs46xx_dsp_scb_types.h"
/*********************************************************************************************
Example hierarchy of stream control blocks in the SP
hfgTree
Ptr____Call (c)
\
-------+------ ------------- ------------- ------------- -----
| SBlaster IF |______\| Foreground |___\| Middlegr'nd |___\| Background |___\| Nul |
| |Goto /| tree header |g /| tree header |g /| tree header |g /| SCB |r
-------------- (g) ------------- ------------- ------------- -----
|c |c |c |c
| | | |
\/ ------------- ------------- -------------
| Foreground |_\ | Middlegr'nd |_\ | Background |_\
| tree |g/ | tree |g/ | tree |g/
------------- ------------- -------------
|c |c |c
| | |
\/ \/ \/
*********************************************************************************************/
#define HFG_FIRST_EXECUTE_MODE 0x0001
#define HFG_FIRST_EXECUTE_MODE_BIT 0
#define HFG_CONTEXT_SWITCH_MODE 0x0002
#define HFG_CONTEXT_SWITCH_MODE_BIT 1
#define MAX_FG_STACK_SIZE 32 /* THESE NEED TO BE COMPUTED PROPERLY */
#define MAX_MG_STACK_SIZE 16
#define MAX_BG_STACK_SIZE 9
#define MAX_HFG_STACK_SIZE 4
#define SLEEP_ACTIVE_INCREMENT 0 /* Enable task tree thread to go to sleep
This should only ever be used on the Background thread */
#define STANDARD_ACTIVE_INCREMENT 1 /* Task tree thread normal operation */
#define SUSPEND_ACTIVE_INCREMENT 2 /* Cause execution to suspend in the task tree thread
This should only ever be used on the Background thread */
#define HOSTFLAGS_DISABLE_BG_SLEEP 0 /* Host-controlled flag that determines whether we go to sleep
at the end of BG */
/* Minimal context save area for Hyper Forground */
struct dsp_hf_save_area {
u32 r10_save;
u32 r54_save;
u32 r98_save;
___DSP_DUAL_16BIT_ALLOC(
status_save,
ind_save
)
___DSP_DUAL_16BIT_ALLOC(
rci1_save,
rci0_save
)
u32 r32_save;
u32 r76_save;
u32 rsd2_save;
___DSP_DUAL_16BIT_ALLOC(
rsi2_save, /* See TaskTreeParameterBlock for
remainder of registers */
rsa2Save
)
/* saved as part of HFG context */
};
/* Task link data structure */
struct dsp_tree_link {
___DSP_DUAL_16BIT_ALLOC(
/* Pointer to sibling task control block */
next_scb,
/* Pointer to child task control block */
sub_ptr
)
___DSP_DUAL_16BIT_ALLOC(
/* Pointer to code entry point */
entry_point,
/* Pointer to local data */
this_spb
)
};
struct dsp_task_tree_data {
___DSP_DUAL_16BIT_ALLOC(
/* Initial tock count; controls task tree execution rate */
tock_count_limit,
/* Tock down counter */
tock_count
)
/* Add to ActiveCount when TockCountLimit reached:
Subtract on task tree termination */
___DSP_DUAL_16BIT_ALLOC(
active_tncrement,
/* Number of pending activations for task tree */
active_count
)
___DSP_DUAL_16BIT_ALLOC(
/* BitNumber to enable modification of correct bit in ActiveTaskFlags */
active_bit,
/* Pointer to OS location for indicating current activity on task level */
active_task_flags_ptr
)
/* Data structure for controlling movement of memory blocks:-
currently unused */
___DSP_DUAL_16BIT_ALLOC(
mem_upd_ptr,
/* Data structure for controlling synchronous link update */
link_upd_ptr
)
___DSP_DUAL_16BIT_ALLOC(
/* Save area for remainder of full context. */
save_area,
/* Address of start of local stack for data storage */
data_stack_base_ptr
)
};
struct dsp_interval_timer_data
{
/* These data items have the same relative locations to those */
___DSP_DUAL_16BIT_ALLOC(
interval_timer_period,
itd_unused
)
/* used for this data in the SPOS control block for SPOS 1.0 */
___DSP_DUAL_16BIT_ALLOC(
num_FG_ticks_this_interval,
num_intervals
)
};
/* This structure contains extra storage for the task tree
Currently, this additional data is related only to a full context save */
struct dsp_task_tree_context_block {
/* Up to 10 values are saved onto the stack. 8 for the task tree, 1 for
The access to the context switch (call or interrupt), and 1 spare that
users should never use. This last may be required by the system */
___DSP_DUAL_16BIT_ALLOC(
stack1,
stack0
)
___DSP_DUAL_16BIT_ALLOC(
stack3,
stack2
)
___DSP_DUAL_16BIT_ALLOC(
stack5,
stack4
)
___DSP_DUAL_16BIT_ALLOC(
stack7,
stack6
)
___DSP_DUAL_16BIT_ALLOC(
stack9,
stack8
)
u32 saverfe;
/* Value may be overwriten by stack save algorithm.
Retain the size of the stack data saved here if used */
___DSP_DUAL_16BIT_ALLOC(
reserved1,
stack_size
)
u32 saverba; /* (HFG) */
u32 saverdc;
u32 savers_config_23; /* (HFG) */
u32 savers_DMA23; /* (HFG) */
u32 saversa0;
u32 saversi0;
u32 saversa1;
u32 saversi1;
u32 saversa3;
u32 saversd0;
u32 saversd1;
u32 saversd3;
u32 savers_config01;
u32 savers_DMA01;
u32 saveacc0hl;
u32 saveacc1hl;
u32 saveacc0xacc1x;
u32 saveacc2hl;
u32 saveacc3hl;
u32 saveacc2xacc3x;
u32 saveaux0hl;
u32 saveaux1hl;
u32 saveaux0xaux1x;
u32 saveaux2hl;
u32 saveaux3hl;
u32 saveaux2xaux3x;
u32 savershouthl;
u32 savershoutxmacmode;
};
struct dsp_task_tree_control_block {
struct dsp_hf_save_area context;
struct dsp_tree_link links;
struct dsp_task_tree_data data;
struct dsp_task_tree_context_block context_blk;
struct dsp_interval_timer_data int_timer;
};
#endif /* __DSP_TASK_TYPES_H__ */

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include/sound/trident.h
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#ifndef __SOUND_TRIDENT_H
#define __SOUND_TRIDENT_H
/*
* audio@tridentmicro.com
* Fri Feb 19 15:55:28 MST 1999
* Definitions for Trident 4DWave DX/NX chips
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include "pcm.h"
#include "mpu401.h"
#include "ac97_codec.h"
#include "util_mem.h"
#define TRIDENT_DEVICE_ID_DX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_DX)
#define TRIDENT_DEVICE_ID_NX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_NX)
#define TRIDENT_DEVICE_ID_SI7018 ((PCI_VENDOR_ID_SI<<16)|PCI_DEVICE_ID_SI_7018)
#define SNDRV_TRIDENT_VOICE_TYPE_PCM 0
#define SNDRV_TRIDENT_VOICE_TYPE_SYNTH 1
#define SNDRV_TRIDENT_VOICE_TYPE_MIDI 2
#define SNDRV_TRIDENT_VFLG_RUNNING (1<<0)
/* TLB code constants */
#define SNDRV_TRIDENT_PAGE_SIZE 4096
#define SNDRV_TRIDENT_PAGE_SHIFT 12
#define SNDRV_TRIDENT_PAGE_MASK ((1<<SNDRV_TRIDENT_PAGE_SHIFT)-1)
#define SNDRV_TRIDENT_MAX_PAGES 4096
/*
* Direct registers
*/
#define TRID_REG(trident, x) ((trident)->port + (x))
#define ID_4DWAVE_DX 0x2000
#define ID_4DWAVE_NX 0x2001
/* Bank definitions */
#define T4D_BANK_A 0
#define T4D_BANK_B 1
#define T4D_NUM_BANKS 2
/* Register definitions */
/* Global registers */
enum global_control_bits {
CHANNEL_IDX = 0x0000003f,
OVERRUN_IE = 0x00000400, /* interrupt enable: capture overrun */
UNDERRUN_IE = 0x00000800, /* interrupt enable: playback underrun */
ENDLP_IE = 0x00001000, /* interrupt enable: end of buffer */
MIDLP_IE = 0x00002000, /* interrupt enable: middle buffer */
ETOG_IE = 0x00004000, /* interrupt enable: envelope toggling */
EDROP_IE = 0x00008000, /* interrupt enable: envelope drop */
BANK_B_EN = 0x00010000, /* SiS: enable bank B (64 channels) */
PCMIN_B_MIX = 0x00020000, /* SiS: PCM IN B mixing enable */
I2S_OUT_ASSIGN = 0x00040000, /* SiS: I2S Out contains surround PCM */
SPDIF_OUT_ASSIGN= 0x00080000, /* SiS: 0=S/PDIF L/R | 1=PCM Out FIFO */
MAIN_OUT_ASSIGN = 0x00100000, /* SiS: 0=PCM Out FIFO | 1=MMC Out buffer */
};
enum miscint_bits {
PB_UNDERRUN_IRQ = 0x00000001, REC_OVERRUN_IRQ = 0x00000002,
SB_IRQ = 0x00000004, MPU401_IRQ = 0x00000008,
OPL3_IRQ = 0x00000010, ADDRESS_IRQ = 0x00000020,
ENVELOPE_IRQ = 0x00000040, PB_UNDERRUN = 0x00000100,
REC_OVERRUN = 0x00000200, MIXER_UNDERFLOW = 0x00000400,
MIXER_OVERFLOW = 0x00000800, NX_SB_IRQ_DISABLE = 0x00001000,
ST_TARGET_REACHED = 0x00008000,
PB_24K_MODE = 0x00010000, ST_IRQ_EN = 0x00800000,
ACGPIO_IRQ = 0x01000000
};
/* T2 legacy dma control registers. */
#define LEGACY_DMAR0 0x00 // ADR0
#define LEGACY_DMAR4 0x04 // CNT0
#define LEGACY_DMAR6 0x06 // CNT0 - High bits
#define LEGACY_DMAR11 0x0b // MOD
#define LEGACY_DMAR15 0x0f // MMR
#define T4D_START_A 0x80
#define T4D_STOP_A 0x84
#define T4D_DLY_A 0x88
#define T4D_SIGN_CSO_A 0x8c
#define T4D_CSPF_A 0x90
#define T4D_CSPF_B 0xbc
#define T4D_CEBC_A 0x94
#define T4D_AINT_A 0x98
#define T4D_AINTEN_A 0x9c
#define T4D_LFO_GC_CIR 0xa0
#define T4D_MUSICVOL_WAVEVOL 0xa8
#define T4D_SBDELTA_DELTA_R 0xac
#define T4D_MISCINT 0xb0
#define T4D_START_B 0xb4
#define T4D_STOP_B 0xb8
#define T4D_SBBL_SBCL 0xc0
#define T4D_SBCTRL_SBE2R_SBDD 0xc4
#define T4D_STIMER 0xc8
#define T4D_AINT_B 0xd8
#define T4D_AINTEN_B 0xdc
#define T4D_RCI 0x70
/* MPU-401 UART */
#define T4D_MPU401_BASE 0x20
#define T4D_MPUR0 0x20
#define T4D_MPUR1 0x21
#define T4D_MPUR2 0x22
#define T4D_MPUR3 0x23
/* S/PDIF Registers */
#define NX_SPCTRL_SPCSO 0x24
#define NX_SPLBA 0x28
#define NX_SPESO 0x2c
#define NX_SPCSTATUS 0x64
/* Joystick */
#define GAMEPORT_GCR 0x30
#define GAMEPORT_MODE_ADC 0x80
#define GAMEPORT_LEGACY 0x31
#define GAMEPORT_AXES 0x34
/* NX Specific Registers */
#define NX_TLBC 0x6c
/* Channel Registers */
#define CH_START 0xe0
#define CH_DX_CSO_ALPHA_FMS 0xe0
#define CH_DX_ESO_DELTA 0xe8
#define CH_DX_FMC_RVOL_CVOL 0xec
#define CH_NX_DELTA_CSO 0xe0
#define CH_NX_DELTA_ESO 0xe8
#define CH_NX_ALPHA_FMS_FMC_RVOL_CVOL 0xec
#define CH_LBA 0xe4
#define CH_GVSEL_PAN_VOL_CTRL_EC 0xf0
#define CH_EBUF1 0xf4
#define CH_EBUF2 0xf8
/* AC-97 Registers */
#define DX_ACR0_AC97_W 0x40
#define DX_ACR1_AC97_R 0x44
#define DX_ACR2_AC97_COM_STAT 0x48
#define NX_ACR0_AC97_COM_STAT 0x40
#define NX_ACR1_AC97_W 0x44
#define NX_ACR2_AC97_R_PRIMARY 0x48
#define NX_ACR3_AC97_R_SECONDARY 0x4c
#define SI_AC97_WRITE 0x40
#define SI_AC97_READ 0x44
#define SI_SERIAL_INTF_CTRL 0x48
#define SI_AC97_GPIO 0x4c
#define SI_ASR0 0x50
#define SI_SPDIF_CS 0x70
#define SI_GPIO 0x7c
enum trident_nx_ac97_bits {
/* ACR1-3 */
NX_AC97_BUSY_WRITE = 0x0800,
NX_AC97_BUSY_READ = 0x0800,
NX_AC97_BUSY_DATA = 0x0400,
NX_AC97_WRITE_SECONDARY = 0x0100,
/* ACR0 */
NX_AC97_SECONDARY_READY = 0x0040,
NX_AC97_SECONDARY_RECORD = 0x0020,
NX_AC97_SURROUND_OUTPUT = 0x0010,
NX_AC97_PRIMARY_READY = 0x0008,
NX_AC97_PRIMARY_RECORD = 0x0004,
NX_AC97_PCM_OUTPUT = 0x0002,
NX_AC97_WARM_RESET = 0x0001
};
enum trident_dx_ac97_bits {
DX_AC97_BUSY_WRITE = 0x8000,
DX_AC97_BUSY_READ = 0x8000,
DX_AC97_READY = 0x0010,
DX_AC97_RECORD = 0x0008,
DX_AC97_PLAYBACK = 0x0002
};
enum sis7018_ac97_bits {
SI_AC97_BUSY_WRITE = 0x00008000,
SI_AC97_AUDIO_BUSY = 0x00004000,
SI_AC97_MODEM_BUSY = 0x00002000,
SI_AC97_BUSY_READ = 0x00008000,
SI_AC97_SECONDARY = 0x00000080,
};
enum serial_intf_ctrl_bits {
WARM_RESET = 0x00000001,
COLD_RESET = 0x00000002,
I2S_CLOCK = 0x00000004,
PCM_SEC_AC97 = 0x00000008,
AC97_DBL_RATE = 0x00000010,
SPDIF_EN = 0x00000020,
I2S_OUTPUT_EN = 0x00000040,
I2S_INPUT_EN = 0x00000080,
PCMIN = 0x00000100,
LINE1IN = 0x00000200,
MICIN = 0x00000400,
LINE2IN = 0x00000800,
HEAD_SET_IN = 0x00001000,
GPIOIN = 0x00002000,
/* 7018 spec says id = 01 but the demo board routed to 10
SECONDARY_ID= 0x00004000, */
SECONDARY_ID = 0x00004000,
PCMOUT = 0x00010000,
SURROUT = 0x00020000,
CENTEROUT = 0x00040000,
LFEOUT = 0x00080000,
LINE1OUT = 0x00100000,
LINE2OUT = 0x00200000,
GPIOOUT = 0x00400000,
SI_AC97_PRIMARY_READY = 0x01000000,
SI_AC97_SECONDARY_READY = 0x02000000,
SI_AC97_POWERDOWN = 0x04000000,
};
/* PCM defaults */
#define T4D_DEFAULT_PCM_VOL 10 /* 0 - 255 */
#define T4D_DEFAULT_PCM_PAN 0 /* 0 - 127 */
#define T4D_DEFAULT_PCM_RVOL 127 /* 0 - 127 */
#define T4D_DEFAULT_PCM_CVOL 127 /* 0 - 127 */
struct snd_trident;
struct snd_trident_voice;
struct snd_trident_pcm_mixer;
struct snd_trident_port {
struct snd_midi_channel_set * chset;
struct snd_trident * trident;
int mode; /* operation mode */
int client; /* sequencer client number */
int port; /* sequencer port number */
unsigned int midi_has_voices: 1;
};
struct snd_trident_memblk_arg {
short first_page, last_page;
};
struct snd_trident_tlb {
unsigned int * entries; /* 16k-aligned TLB table */
dma_addr_t entries_dmaaddr; /* 16k-aligned PCI address to TLB table */
unsigned long * shadow_entries; /* shadow entries with virtual addresses */
struct snd_dma_buffer buffer;
struct snd_util_memhdr * memhdr; /* page allocation list */
struct snd_dma_buffer silent_page;
};
struct snd_trident_voice {
unsigned int number;
unsigned int use: 1,
pcm: 1,
synth:1,
midi: 1;
unsigned int flags;
unsigned char client;
unsigned char port;
unsigned char index;
struct snd_trident_sample_ops *sample_ops;
/* channel parameters */
unsigned int CSO; /* 24 bits (16 on DX) */
unsigned int ESO; /* 24 bits (16 on DX) */
unsigned int LBA; /* 30 bits */
unsigned short EC; /* 12 bits */
unsigned short Alpha; /* 12 bits */
unsigned short Delta; /* 16 bits */
unsigned short Attribute; /* 16 bits - SiS 7018 */
unsigned short Vol; /* 12 bits (6.6) */
unsigned char Pan; /* 7 bits (1.4.2) */
unsigned char GVSel; /* 1 bit */
unsigned char RVol; /* 7 bits (5.2) */
unsigned char CVol; /* 7 bits (5.2) */
unsigned char FMC; /* 2 bits */
unsigned char CTRL; /* 4 bits */
unsigned char FMS; /* 4 bits */
unsigned char LFO; /* 8 bits */
unsigned int negCSO; /* nonzero - use negative CSO */
struct snd_util_memblk *memblk; /* memory block if TLB enabled */
/* PCM data */
struct snd_trident *trident;
struct snd_pcm_substream *substream;
struct snd_trident_voice *extra; /* extra PCM voice (acts as interrupt generator) */
unsigned int running: 1,
capture: 1,
spdif: 1,
foldback: 1,
isync: 1,
isync2: 1,
isync3: 1;
int foldback_chan; /* foldback subdevice number */
unsigned int stimer; /* global sample timer (to detect spurious interrupts) */
unsigned int spurious_threshold; /* spurious threshold */
unsigned int isync_mark;
unsigned int isync_max;
unsigned int isync_ESO;
/* --- */
void *private_data;
void (*private_free)(struct snd_trident_voice *voice);
};
struct snd_4dwave {
int seq_client;
struct snd_trident_port seq_ports[4];
struct snd_trident_voice voices[64];
int ChanSynthCount; /* number of allocated synth channels */
int max_size; /* maximum synth memory size in bytes */
int current_size; /* current allocated synth mem in bytes */
};
struct snd_trident_pcm_mixer {
struct snd_trident_voice *voice; /* active voice */
unsigned short vol; /* front volume */
unsigned char pan; /* pan control */
unsigned char rvol; /* rear volume */
unsigned char cvol; /* center volume */
unsigned char pad;
};
struct snd_trident {
int irq;
unsigned int device; /* device ID */
unsigned char bDMAStart;
unsigned long port;
unsigned long midi_port;
unsigned int spurious_irq_count;
unsigned int spurious_irq_max_delta;
struct snd_trident_tlb tlb; /* TLB entries for NX cards */
unsigned char spdif_ctrl;
unsigned char spdif_pcm_ctrl;
unsigned int spdif_bits;
unsigned int spdif_pcm_bits;
struct snd_kcontrol *spdif_pcm_ctl; /* S/PDIF settings */
unsigned int ac97_ctrl;
unsigned int ChanMap[2]; /* allocation map for hardware channels */
int ChanPCM; /* max number of PCM channels */
int ChanPCMcnt; /* actual number of PCM channels */
unsigned int ac97_detect: 1; /* 1 = AC97 in detection phase */
unsigned int in_suspend: 1; /* 1 during suspend/resume */
struct snd_4dwave synth; /* synth specific variables */
spinlock_t event_lock;
spinlock_t voice_alloc;
struct snd_dma_device dma_dev;
struct pci_dev *pci;
struct snd_card *card;
struct snd_pcm *pcm; /* ADC/DAC PCM */
struct snd_pcm *foldback; /* Foldback PCM */
struct snd_pcm *spdif; /* SPDIF PCM */
struct snd_rawmidi *rmidi;
struct snd_ac97_bus *ac97_bus;
struct snd_ac97 *ac97;
struct snd_ac97 *ac97_sec;
unsigned int musicvol_wavevol;
struct snd_trident_pcm_mixer pcm_mixer[32];
struct snd_kcontrol *ctl_vol; /* front volume */
struct snd_kcontrol *ctl_pan; /* pan */
struct snd_kcontrol *ctl_rvol; /* rear volume */
struct snd_kcontrol *ctl_cvol; /* center volume */
spinlock_t reg_lock;
struct gameport *gameport;
};
int snd_trident_create(struct snd_card *card,
struct pci_dev *pci,
int pcm_streams,
int pcm_spdif_device,
int max_wavetable_size,
struct snd_trident ** rtrident);
int snd_trident_create_gameport(struct snd_trident *trident);
int snd_trident_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm);
int snd_trident_foldback_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm);
int snd_trident_spdif_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm);
int snd_trident_attach_synthesizer(struct snd_trident * trident);
struct snd_trident_voice *snd_trident_alloc_voice(struct snd_trident * trident, int type,
int client, int port);
void snd_trident_free_voice(struct snd_trident * trident, struct snd_trident_voice *voice);
void snd_trident_start_voice(struct snd_trident * trident, unsigned int voice);
void snd_trident_stop_voice(struct snd_trident * trident, unsigned int voice);
void snd_trident_write_voice_regs(struct snd_trident * trident, struct snd_trident_voice *voice);
int snd_trident_suspend(struct pci_dev *pci, pm_message_t state);
int snd_trident_resume(struct pci_dev *pci);
/* TLB memory allocation */
struct snd_util_memblk *snd_trident_alloc_pages(struct snd_trident *trident,
struct snd_pcm_substream *substream);
int snd_trident_free_pages(struct snd_trident *trident, struct snd_util_memblk *blk);
struct snd_util_memblk *snd_trident_synth_alloc(struct snd_trident *trident, unsigned int size);
int snd_trident_synth_free(struct snd_trident *trident, struct snd_util_memblk *blk);
int snd_trident_synth_copy_from_user(struct snd_trident *trident, struct snd_util_memblk *blk,
int offset, const char __user *data, int size);
#endif /* __SOUND_TRIDENT_H */

2
include/sound/vx_core.h
View File

@@ -341,7 +341,7 @@ int vx_change_frequency(struct vx_core *chip);
/*
* PM
*/
int snd_vx_suspend(struct vx_core *card, pm_message_t state);
int snd_vx_suspend(struct vx_core *card);
int snd_vx_resume(struct vx_core *card);
/*

390
include/sound/ymfpci.h
View File

@@ -1,390 +0,0 @@
#ifndef __SOUND_YMFPCI_H
#define __SOUND_YMFPCI_H
/*
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
* Definitions for Yahama YMF724/740/744/754 chips
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include "pcm.h"
#include "rawmidi.h"
#include "ac97_codec.h"
#include "timer.h"
#include <linux/gameport.h>
/*
* Direct registers
*/
#define YMFREG(chip, reg) (chip->port + YDSXGR_##reg)
#define YDSXGR_INTFLAG 0x0004
#define YDSXGR_ACTIVITY 0x0006
#define YDSXGR_GLOBALCTRL 0x0008
#define YDSXGR_ZVCTRL 0x000A
#define YDSXGR_TIMERCTRL 0x0010
#define YDSXGR_TIMERCOUNT 0x0012
#define YDSXGR_SPDIFOUTCTRL 0x0018
#define YDSXGR_SPDIFOUTSTATUS 0x001C
#define YDSXGR_EEPROMCTRL 0x0020
#define YDSXGR_SPDIFINCTRL 0x0034
#define YDSXGR_SPDIFINSTATUS 0x0038
#define YDSXGR_DSPPROGRAMDL 0x0048
#define YDSXGR_DLCNTRL 0x004C
#define YDSXGR_GPIOININTFLAG 0x0050
#define YDSXGR_GPIOININTENABLE 0x0052
#define YDSXGR_GPIOINSTATUS 0x0054
#define YDSXGR_GPIOOUTCTRL 0x0056
#define YDSXGR_GPIOFUNCENABLE 0x0058
#define YDSXGR_GPIOTYPECONFIG 0x005A
#define YDSXGR_AC97CMDDATA 0x0060
#define YDSXGR_AC97CMDADR 0x0062
#define YDSXGR_PRISTATUSDATA 0x0064
#define YDSXGR_PRISTATUSADR 0x0066
#define YDSXGR_SECSTATUSDATA 0x0068
#define YDSXGR_SECSTATUSADR 0x006A
#define YDSXGR_SECCONFIG 0x0070
#define YDSXGR_LEGACYOUTVOL 0x0080
#define YDSXGR_LEGACYOUTVOLL 0x0080
#define YDSXGR_LEGACYOUTVOLR 0x0082
#define YDSXGR_NATIVEDACOUTVOL 0x0084
#define YDSXGR_NATIVEDACOUTVOLL 0x0084
#define YDSXGR_NATIVEDACOUTVOLR 0x0086
#define YDSXGR_ZVOUTVOL 0x0088
#define YDSXGR_ZVOUTVOLL 0x0088
#define YDSXGR_ZVOUTVOLR 0x008A
#define YDSXGR_SECADCOUTVOL 0x008C
#define YDSXGR_SECADCOUTVOLL 0x008C
#define YDSXGR_SECADCOUTVOLR 0x008E
#define YDSXGR_PRIADCOUTVOL 0x0090
#define YDSXGR_PRIADCOUTVOLL 0x0090
#define YDSXGR_PRIADCOUTVOLR 0x0092
#define YDSXGR_LEGACYLOOPVOL 0x0094
#define YDSXGR_LEGACYLOOPVOLL 0x0094
#define YDSXGR_LEGACYLOOPVOLR 0x0096
#define YDSXGR_NATIVEDACLOOPVOL 0x0098
#define YDSXGR_NATIVEDACLOOPVOLL 0x0098
#define YDSXGR_NATIVEDACLOOPVOLR 0x009A
#define YDSXGR_ZVLOOPVOL 0x009C
#define YDSXGR_ZVLOOPVOLL 0x009E
#define YDSXGR_ZVLOOPVOLR 0x009E
#define YDSXGR_SECADCLOOPVOL 0x00A0
#define YDSXGR_SECADCLOOPVOLL 0x00A0
#define YDSXGR_SECADCLOOPVOLR 0x00A2
#define YDSXGR_PRIADCLOOPVOL 0x00A4
#define YDSXGR_PRIADCLOOPVOLL 0x00A4
#define YDSXGR_PRIADCLOOPVOLR 0x00A6
#define YDSXGR_NATIVEADCINVOL 0x00A8
#define YDSXGR_NATIVEADCINVOLL 0x00A8
#define YDSXGR_NATIVEADCINVOLR 0x00AA
#define YDSXGR_NATIVEDACINVOL 0x00AC
#define YDSXGR_NATIVEDACINVOLL 0x00AC
#define YDSXGR_NATIVEDACINVOLR 0x00AE
#define YDSXGR_BUF441OUTVOL 0x00B0
#define YDSXGR_BUF441OUTVOLL 0x00B0
#define YDSXGR_BUF441OUTVOLR 0x00B2
#define YDSXGR_BUF441LOOPVOL 0x00B4
#define YDSXGR_BUF441LOOPVOLL 0x00B4
#define YDSXGR_BUF441LOOPVOLR 0x00B6
#define YDSXGR_SPDIFOUTVOL 0x00B8
#define YDSXGR_SPDIFOUTVOLL 0x00B8
#define YDSXGR_SPDIFOUTVOLR 0x00BA
#define YDSXGR_SPDIFLOOPVOL 0x00BC
#define YDSXGR_SPDIFLOOPVOLL 0x00BC
#define YDSXGR_SPDIFLOOPVOLR 0x00BE
#define YDSXGR_ADCSLOTSR 0x00C0
#define YDSXGR_RECSLOTSR 0x00C4
#define YDSXGR_ADCFORMAT 0x00C8
#define YDSXGR_RECFORMAT 0x00CC
#define YDSXGR_P44SLOTSR 0x00D0
#define YDSXGR_STATUS 0x0100
#define YDSXGR_CTRLSELECT 0x0104
#define YDSXGR_MODE 0x0108
#define YDSXGR_SAMPLECOUNT 0x010C
#define YDSXGR_NUMOFSAMPLES 0x0110
#define YDSXGR_CONFIG 0x0114
#define YDSXGR_PLAYCTRLSIZE 0x0140
#define YDSXGR_RECCTRLSIZE 0x0144
#define YDSXGR_EFFCTRLSIZE 0x0148
#define YDSXGR_WORKSIZE 0x014C
#define YDSXGR_MAPOFREC 0x0150
#define YDSXGR_MAPOFEFFECT 0x0154
#define YDSXGR_PLAYCTRLBASE 0x0158
#define YDSXGR_RECCTRLBASE 0x015C
#define YDSXGR_EFFCTRLBASE 0x0160
#define YDSXGR_WORKBASE 0x0164
#define YDSXGR_DSPINSTRAM 0x1000
#define YDSXGR_CTRLINSTRAM 0x4000
#define YDSXG_AC97READCMD 0x8000
#define YDSXG_AC97WRITECMD 0x0000
#define PCIR_DSXG_LEGACY 0x40
#define PCIR_DSXG_ELEGACY 0x42
#define PCIR_DSXG_CTRL 0x48
#define PCIR_DSXG_PWRCTRL1 0x4a
#define PCIR_DSXG_PWRCTRL2 0x4e
#define PCIR_DSXG_FMBASE 0x60
#define PCIR_DSXG_SBBASE 0x62
#define PCIR_DSXG_MPU401BASE 0x64
#define PCIR_DSXG_JOYBASE 0x66
#define YDSXG_DSPLENGTH 0x0080
#define YDSXG_CTRLLENGTH 0x3000
#define YDSXG_DEFAULT_WORK_SIZE 0x0400
#define YDSXG_PLAYBACK_VOICES 64
#define YDSXG_CAPTURE_VOICES 2
#define YDSXG_EFFECT_VOICES 5
#define YMFPCI_LEGACY_SBEN (1 << 0) /* soundblaster enable */
#define YMFPCI_LEGACY_FMEN (1 << 1) /* OPL3 enable */
#define YMFPCI_LEGACY_JPEN (1 << 2) /* joystick enable */
#define YMFPCI_LEGACY_MEN (1 << 3) /* MPU401 enable */
#define YMFPCI_LEGACY_MIEN (1 << 4) /* MPU RX irq enable */
#define YMFPCI_LEGACY_IOBITS (1 << 5) /* i/o bits range, 0 = 16bit, 1 =10bit */
#define YMFPCI_LEGACY_SDMA (3 << 6) /* SB DMA select */
#define YMFPCI_LEGACY_SBIRQ (7 << 8) /* SB IRQ select */
#define YMFPCI_LEGACY_MPUIRQ (7 << 11) /* MPU IRQ select */
#define YMFPCI_LEGACY_SIEN (1 << 14) /* serialized IRQ */
#define YMFPCI_LEGACY_LAD (1 << 15) /* legacy audio disable */
#define YMFPCI_LEGACY2_FMIO (3 << 0) /* OPL3 i/o address (724/740) */
#define YMFPCI_LEGACY2_SBIO (3 << 2) /* SB i/o address (724/740) */
#define YMFPCI_LEGACY2_MPUIO (3 << 4) /* MPU401 i/o address (724/740) */
#define YMFPCI_LEGACY2_JSIO (3 << 6) /* joystick i/o address (724/740) */
#define YMFPCI_LEGACY2_MAIM (1 << 8) /* MPU401 ack intr mask */
#define YMFPCI_LEGACY2_SMOD (3 << 11) /* SB DMA mode */
#define YMFPCI_LEGACY2_SBVER (3 << 13) /* SB version select */
#define YMFPCI_LEGACY2_IMOD (1 << 15) /* legacy IRQ mode */
/* SIEN:IMOD 0:0 = legacy irq, 0:1 = INTA, 1:0 = serialized IRQ */
#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
#define SUPPORT_JOYSTICK
#endif
/*
*
*/
struct snd_ymfpci_playback_bank {
u32 format;
u32 loop_default;
u32 base; /* 32-bit address */
u32 loop_start; /* 32-bit offset */
u32 loop_end; /* 32-bit offset */
u32 loop_frac; /* 8-bit fraction - loop_start */
u32 delta_end; /* pitch delta end */
u32 lpfK_end;
u32 eg_gain_end;
u32 left_gain_end;
u32 right_gain_end;
u32 eff1_gain_end;
u32 eff2_gain_end;
u32 eff3_gain_end;
u32 lpfQ;
u32 status;
u32 num_of_frames;
u32 loop_count;
u32 start;
u32 start_frac;
u32 delta;
u32 lpfK;
u32 eg_gain;
u32 left_gain;
u32 right_gain;
u32 eff1_gain;
u32 eff2_gain;
u32 eff3_gain;
u32 lpfD1;
u32 lpfD2;
};
struct snd_ymfpci_capture_bank {
u32 base; /* 32-bit address */
u32 loop_end; /* 32-bit offset */
u32 start; /* 32-bit offset */
u32 num_of_loops; /* counter */
};
struct snd_ymfpci_effect_bank {
u32 base; /* 32-bit address */
u32 loop_end; /* 32-bit offset */
u32 start; /* 32-bit offset */
u32 temp;
};
struct snd_ymfpci_pcm;
struct snd_ymfpci;
enum snd_ymfpci_voice_type {
YMFPCI_PCM,
YMFPCI_SYNTH,
YMFPCI_MIDI
};
struct snd_ymfpci_voice {
struct snd_ymfpci *chip;
int number;
unsigned int use: 1,
pcm: 1,
synth: 1,
midi: 1;
struct snd_ymfpci_playback_bank *bank;
dma_addr_t bank_addr;
void (*interrupt)(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice);
struct snd_ymfpci_pcm *ypcm;
};
enum snd_ymfpci_pcm_type {
PLAYBACK_VOICE,
CAPTURE_REC,
CAPTURE_AC97,
EFFECT_DRY_LEFT,
EFFECT_DRY_RIGHT,
EFFECT_EFF1,
EFFECT_EFF2,
EFFECT_EFF3
};
struct snd_ymfpci_pcm {
struct snd_ymfpci *chip;
enum snd_ymfpci_pcm_type type;
struct snd_pcm_substream *substream;
struct snd_ymfpci_voice *voices[2]; /* playback only */
unsigned int running: 1,
use_441_slot: 1,
output_front: 1,
output_rear: 1,
swap_rear: 1;
unsigned int update_pcm_vol;
u32 period_size; /* cached from runtime->period_size */
u32 buffer_size; /* cached from runtime->buffer_size */
u32 period_pos;
u32 last_pos;
u32 capture_bank_number;
u32 shift;
};
struct snd_ymfpci {
int irq;
unsigned int device_id; /* PCI device ID */
unsigned char rev; /* PCI revision */
unsigned long reg_area_phys;
void __iomem *reg_area_virt;
struct resource *res_reg_area;
struct resource *fm_res;
struct resource *mpu_res;
unsigned short old_legacy_ctrl;
#ifdef SUPPORT_JOYSTICK
struct gameport *gameport;
#endif
struct snd_dma_buffer work_ptr;
unsigned int bank_size_playback;
unsigned int bank_size_capture;
unsigned int bank_size_effect;
unsigned int work_size;
void *bank_base_playback;
void *bank_base_capture;
void *bank_base_effect;
void *work_base;
dma_addr_t bank_base_playback_addr;
dma_addr_t bank_base_capture_addr;
dma_addr_t bank_base_effect_addr;
dma_addr_t work_base_addr;
struct snd_dma_buffer ac3_tmp_base;
u32 *ctrl_playback;
struct snd_ymfpci_playback_bank *bank_playback[YDSXG_PLAYBACK_VOICES][2];
struct snd_ymfpci_capture_bank *bank_capture[YDSXG_CAPTURE_VOICES][2];
struct snd_ymfpci_effect_bank *bank_effect[YDSXG_EFFECT_VOICES][2];
int start_count;
u32 active_bank;
struct snd_ymfpci_voice voices[64];
int src441_used;
struct snd_ac97_bus *ac97_bus;
struct snd_ac97 *ac97;
struct snd_rawmidi *rawmidi;
struct snd_timer *timer;
unsigned int timer_ticks;
struct pci_dev *pci;
struct snd_card *card;
struct snd_pcm *pcm;
struct snd_pcm *pcm2;
struct snd_pcm *pcm_spdif;
struct snd_pcm *pcm_4ch;
struct snd_pcm_substream *capture_substream[YDSXG_CAPTURE_VOICES];
struct snd_pcm_substream *effect_substream[YDSXG_EFFECT_VOICES];
struct snd_kcontrol *ctl_vol_recsrc;
struct snd_kcontrol *ctl_vol_adcrec;
struct snd_kcontrol *ctl_vol_spdifrec;
unsigned short spdif_bits, spdif_pcm_bits;
struct snd_kcontrol *spdif_pcm_ctl;
int mode_dup4ch;
int rear_opened;
int spdif_opened;
struct snd_ymfpci_pcm_mixer {
u16 left;
u16 right;
struct snd_kcontrol *ctl;
} pcm_mixer[32];
spinlock_t reg_lock;
spinlock_t voice_lock;
wait_queue_head_t interrupt_sleep;
atomic_t interrupt_sleep_count;
struct snd_info_entry *proc_entry;
const struct firmware *dsp_microcode;
const struct firmware *controller_microcode;
#ifdef CONFIG_PM
u32 *saved_regs;
u32 saved_ydsxgr_mode;
u16 saved_dsxg_legacy;
u16 saved_dsxg_elegacy;
#endif
};
int snd_ymfpci_create(struct snd_card *card,
struct pci_dev *pci,
unsigned short old_legacy_ctrl,
struct snd_ymfpci ** rcodec);
void snd_ymfpci_free_gameport(struct snd_ymfpci *chip);
int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state);
int snd_ymfpci_resume(struct pci_dev *pci);
int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm);
int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm);
int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm);
int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm);
int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch);
int snd_ymfpci_timer(struct snd_ymfpci *chip, int device);
#endif /* __SOUND_YMFPCI_H */