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arm64: dts: marvell: Add UART1-3 for AC5/AC5X

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The AC5/AC5X SoC has 4 UART blocks. Add the additional UART1-3 blocks to
the base dtsi file.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Chris Packham
2022-08-03 13:16:23 +12:00
committed by Gregory CLEMENT
parent 568035b01c
commit 31be791e26
1 changed files with 30 additions and 0 deletions
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30
arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi
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@@ -95,6 +95,36 @@
status = "okay";
};
uart1: serial@12100 {
compatible = "snps,dw-apb-uart";
reg = <0x11000 0x100>;
reg-shift = <2>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&cnm_clock>;
status = "disabled";
};
uart2: serial@12200 {
compatible = "snps,dw-apb-uart";
reg = <0x12200 0x100>;
reg-shift = <2>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&cnm_clock>;
status = "disabled";
};
uart3: serial@12300 {
compatible = "snps,dw-apb-uart";
reg = <0x12300 0x100>;
reg-shift = <2>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&cnm_clock>;
status = "disabled";
};
mdio: mdio@22004 {
#address-cells = <1>;
#size-cells = <0>;