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m68k: Fix invalid RMW_INSNS on CPUs that lack CAS

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[ Upstream commit 2189e928b6 ]

When enabling CONFIG_RMW_INSNS in e.g. a Coldfire build:

    {standard input}:3068: Error: invalid instruction for this architecture; needs 68020 or higher (68020 [68k, 68ec020], 68030 [68ec030], 68040 [68ec040], 68060 [68ec060]) -- statement `casl %d4,%d0,(%a6)' ignored

Fix this by (a) adding a new config symbol to track if support for any
CPU that lacks the CAS instruction is enabled, and (b) making
CONFIG_RMW_INSNS depend on the new symbol not being set.

Fixes: 0e152d8050 ("m68k: reorganize Kconfig options to improve mmu/non-mmu selections")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210725104413.318932-1-geert@linux-m68k.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Geert Uytterhoeven
2021-07-25 12:44:13 +02:00
committed by Greg Kroah-Hartman
parent 497f3d9c3f
commit 3868507181
1 changed files with 7 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
arch/m68k/Kconfig.cpu
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@@ -25,6 +25,7 @@ config COLDFIRE
bool "Coldfire CPU family support" bool "Coldfire CPU family support"
select ARCH_HAVE_CUSTOM_GPIO_H select ARCH_HAVE_CUSTOM_GPIO_H
select CPU_HAS_NO_BITFIELDS select CPU_HAS_NO_BITFIELDS
select CPU_HAS_NO_CAS
select CPU_HAS_NO_MULDIV64 select CPU_HAS_NO_MULDIV64
select GENERIC_CSUM select GENERIC_CSUM
select GPIOLIB select GPIOLIB
@@ -38,6 +39,7 @@ config M68000
bool "MC68000" bool "MC68000"
depends on !MMU depends on !MMU
select CPU_HAS_NO_BITFIELDS select CPU_HAS_NO_BITFIELDS
select CPU_HAS_NO_CAS
select CPU_HAS_NO_MULDIV64 select CPU_HAS_NO_MULDIV64
select CPU_HAS_NO_UNALIGNED select CPU_HAS_NO_UNALIGNED
select GENERIC_CSUM select GENERIC_CSUM
@@ -53,6 +55,7 @@ config M68000
config MCPU32 config MCPU32
bool bool
select CPU_HAS_NO_BITFIELDS select CPU_HAS_NO_BITFIELDS
select CPU_HAS_NO_CAS
select CPU_HAS_NO_UNALIGNED select CPU_HAS_NO_UNALIGNED
select CPU_NO_EFFICIENT_FFS select CPU_NO_EFFICIENT_FFS
help help
@@ -357,7 +360,7 @@ config ADVANCED
config RMW_INSNS config RMW_INSNS
bool "Use read-modify-write instructions" bool "Use read-modify-write instructions"
depends on ADVANCED depends on ADVANCED && !CPU_HAS_NO_CAS
help help
This allows to use certain instructions that work with indivisible This allows to use certain instructions that work with indivisible
read-modify-write bus cycles. While this is faster than the read-modify-write bus cycles. While this is faster than the
@@ -411,6 +414,9 @@ config NODES_SHIFT
config CPU_HAS_NO_BITFIELDS config CPU_HAS_NO_BITFIELDS
bool bool
config CPU_HAS_NO_CAS
bool
config CPU_HAS_NO_MULDIV64 config CPU_HAS_NO_MULDIV64
bool bool