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drm/amd/display/dm: add support for OEM i2c bus
Expose the OEM i2c bus on boards that support it. This bus is used for OEM specific features like RGB, etc. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -179,6 +179,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev);
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static void amdgpu_dm_fini(struct amdgpu_device *adev);
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static bool is_freesync_video_mode(const struct drm_display_mode *mode, struct amdgpu_dm_connector *aconnector);
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static void reset_freesync_config_for_crtc(struct dm_crtc_state *new_crtc_state);
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static struct amdgpu_i2c_adapter *
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create_i2c(struct ddc_service *ddc_service, bool oem);
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static enum drm_mode_subconnector get_subconnector_type(struct dc_link *link)
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{
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@@ -2893,6 +2895,33 @@ static int amdgpu_dm_smu_write_watermarks_table(struct amdgpu_device *adev)
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return 0;
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}
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static int dm_oem_i2c_hw_init(struct amdgpu_device *adev)
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{
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struct amdgpu_display_manager *dm = &adev->dm;
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struct amdgpu_i2c_adapter *oem_i2c;
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struct ddc_service *oem_ddc_service;
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int r;
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oem_ddc_service = dc_get_oem_i2c_device(adev->dm.dc);
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if (oem_ddc_service) {
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oem_i2c = create_i2c(oem_ddc_service, true);
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if (!oem_i2c) {
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dev_info(adev->dev, "Failed to create oem i2c adapter data\n");
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return -ENOMEM;
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}
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r = i2c_add_adapter(&oem_i2c->base);
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if (r) {
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dev_info(adev->dev, "Failed to register oem i2c\n");
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kfree(oem_i2c);
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return r;
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}
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dm->oem_i2c = oem_i2c;
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}
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return 0;
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}
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/**
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* dm_hw_init() - Initialize DC device
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* @ip_block: Pointer to the amdgpu_ip_block for this hw instance.
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@@ -2924,6 +2953,10 @@ static int dm_hw_init(struct amdgpu_ip_block *ip_block)
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return r;
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amdgpu_dm_hpd_init(adev);
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r = dm_oem_i2c_hw_init(adev);
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if (r)
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dev_info(adev->dev, "Failed to add OEM i2c bus\n");
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return 0;
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}
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@@ -2939,6 +2972,8 @@ static int dm_hw_fini(struct amdgpu_ip_block *ip_block)
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{
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struct amdgpu_device *adev = ip_block->adev;
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kfree(adev->dm.oem_i2c);
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amdgpu_dm_hpd_fini(adev);
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amdgpu_dm_irq_fini(adev);
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@@ -606,6 +606,13 @@ struct amdgpu_display_manager {
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* Bounding box data read from dmub during early initialization for DCN4+
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*/
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struct dml2_soc_bb *bb_from_dmub;
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/**
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* @oem_i2c:
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*
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* OEM i2c bus
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*/
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struct amdgpu_i2c_adapter *oem_i2c;
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};
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enum dsc_clock_force_state {
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