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dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280

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The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Also add clock ids for
LPASS core clocks and audio clock IDs for LPASS client to request for
the clocks.

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220223172248.18877-1-tdas@codeaurora.org
This commit is contained in:
Taniya Das
2022-02-23 22:52:47 +05:30
committed by Bjorn Andersson
parent 3123109284
commit 4185b27b3b
3 changed files with 241 additions and 0 deletions
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43
include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h Normal file
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_AUDIO_CC_SC7280_H
#define _DT_BINDINGS_CLK_QCOM_LPASS_AUDIO_CC_SC7280_H
/* LPASS_AUDIO_CC clocks */
#define LPASS_AUDIO_CC_PLL 0
#define LPASS_AUDIO_CC_PLL_OUT_AUX2 1
#define LPASS_AUDIO_CC_PLL_OUT_AUX2_DIV_CLK_SRC 2
#define LPASS_AUDIO_CC_PLL_OUT_MAIN_DIV_CLK_SRC 3
#define LPASS_AUDIO_CC_CDIV_RX_MCLK_DIV_CLK_SRC 4
#define LPASS_AUDIO_CC_CODEC_MEM0_CLK 5
#define LPASS_AUDIO_CC_CODEC_MEM1_CLK 6
#define LPASS_AUDIO_CC_CODEC_MEM2_CLK 7
#define LPASS_AUDIO_CC_CODEC_MEM_CLK 8
#define LPASS_AUDIO_CC_EXT_MCLK0_CLK 9
#define LPASS_AUDIO_CC_EXT_MCLK0_CLK_SRC 10
#define LPASS_AUDIO_CC_EXT_MCLK1_CLK 11
#define LPASS_AUDIO_CC_EXT_MCLK1_CLK_SRC 12
#define LPASS_AUDIO_CC_RX_MCLK_2X_CLK 13
#define LPASS_AUDIO_CC_RX_MCLK_CLK 14
#define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC 15
/* LPASS_AON_CC clocks */
#define LPASS_AON_CC_PLL 0
#define LPASS_AON_CC_PLL_OUT_EVEN 1
#define LPASS_AON_CC_PLL_OUT_MAIN_CDIV_DIV_CLK_SRC 2
#define LPASS_AON_CC_PLL_OUT_ODD 3
#define LPASS_AON_CC_AUDIO_HM_H_CLK 4
#define LPASS_AON_CC_CDIV_TX_MCLK_DIV_CLK_SRC 5
#define LPASS_AON_CC_MAIN_RCG_CLK_SRC 6
#define LPASS_AON_CC_TX_MCLK_2X_CLK 7
#define LPASS_AON_CC_TX_MCLK_CLK 8
#define LPASS_AON_CC_TX_MCLK_RCG_CLK_SRC 9
#define LPASS_AON_CC_VA_MEM0_CLK 10
/* LPASS_AON_CC power domains */
#define LPASS_AON_CC_LPASS_AUDIO_HM_GDSC 0
#endif

26
include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h Normal file
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7280_H
#define _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7280_H
/* LPASS_CORE_CC clocks */
#define LPASS_CORE_CC_DIG_PLL 0
#define LPASS_CORE_CC_DIG_PLL_OUT_MAIN_DIV_CLK_SRC 1
#define LPASS_CORE_CC_DIG_PLL_OUT_ODD 2
#define LPASS_CORE_CC_CORE_CLK 3
#define LPASS_CORE_CC_CORE_CLK_SRC 4
#define LPASS_CORE_CC_EXT_IF0_CLK_SRC 5
#define LPASS_CORE_CC_EXT_IF0_IBIT_CLK 6
#define LPASS_CORE_CC_EXT_IF1_CLK_SRC 7
#define LPASS_CORE_CC_EXT_IF1_IBIT_CLK 8
#define LPASS_CORE_CC_LPM_CORE_CLK 9
#define LPASS_CORE_CC_LPM_MEM0_CORE_CLK 10
#define LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK 11
/* LPASS_CORE_CC power domains */
#define LPASS_CORE_CC_LPASS_CORE_HM_GDSC 0
#endif