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Merge tag 'mmc-v6.18-rc2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC fix from Ulf Hansson: - sdhci-of-dwcmshc: Fix reset handling for some variants * tag 'mmc-v6.18-rc2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: sdhci-of-dwcmshc: Promote the th1520 reset handling to ip level
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@@ -289,6 +289,19 @@ static void dwcmshc_adma_write_desc(struct sdhci_host *host, void **desc,
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sdhci_adma_write_desc(host, desc, addr, len, cmd);
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sdhci_adma_write_desc(host, desc, addr, len, cmd);
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}
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}
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static void dwcmshc_reset(struct sdhci_host *host, u8 mask)
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{
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sdhci_reset(host, mask);
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/* The dwcmshc does not comply with the SDHCI specification
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* regarding the "Software Reset for CMD line should clear 'Command
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* Complete' in the Normal Interrupt Status Register." Clear the bit
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* here to compensate for this quirk.
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*/
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if (mask & SDHCI_RESET_CMD)
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sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS);
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}
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static unsigned int dwcmshc_get_max_clock(struct sdhci_host *host)
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static unsigned int dwcmshc_get_max_clock(struct sdhci_host *host)
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{
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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@@ -832,15 +845,7 @@ static void th1520_sdhci_reset(struct sdhci_host *host, u8 mask)
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struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
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struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
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u16 ctrl_2;
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u16 ctrl_2;
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sdhci_reset(host, mask);
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dwcmshc_reset(host, mask);
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/* The T-Head 1520 SoC does not comply with the SDHCI specification
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* regarding the "Software Reset for CMD line should clear 'Command
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* Complete' in the Normal Interrupt Status Register." Clear the bit
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* here to compensate for this quirk.
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*/
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if (mask & SDHCI_RESET_CMD)
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sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS);
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if (priv->flags & FLAG_IO_FIXED_1V8) {
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if (priv->flags & FLAG_IO_FIXED_1V8) {
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ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
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ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
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@@ -886,7 +891,7 @@ static void cv18xx_sdhci_reset(struct sdhci_host *host, u8 mask)
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struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
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struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
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u32 val, emmc_caps = MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO;
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u32 val, emmc_caps = MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO;
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sdhci_reset(host, mask);
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dwcmshc_reset(host, mask);
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if ((host->mmc->caps2 & emmc_caps) == emmc_caps) {
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if ((host->mmc->caps2 & emmc_caps) == emmc_caps) {
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val = sdhci_readl(host, priv->vendor_specific_area1 + CV18XX_SDHCI_MSHC_CTRL);
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val = sdhci_readl(host, priv->vendor_specific_area1 + CV18XX_SDHCI_MSHC_CTRL);
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@@ -958,7 +963,7 @@ static void cv18xx_sdhci_post_tuning(struct sdhci_host *host)
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val |= SDHCI_INT_DATA_AVAIL;
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val |= SDHCI_INT_DATA_AVAIL;
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sdhci_writel(host, val, SDHCI_INT_STATUS);
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sdhci_writel(host, val, SDHCI_INT_STATUS);
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sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
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dwcmshc_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
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}
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}
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static int cv18xx_sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
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static int cv18xx_sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
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@@ -1100,7 +1105,7 @@ static const struct sdhci_ops sdhci_dwcmshc_ops = {
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.set_bus_width = sdhci_set_bus_width,
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.set_bus_width = sdhci_set_bus_width,
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.set_uhs_signaling = dwcmshc_set_uhs_signaling,
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.set_uhs_signaling = dwcmshc_set_uhs_signaling,
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.get_max_clock = dwcmshc_get_max_clock,
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.get_max_clock = dwcmshc_get_max_clock,
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.reset = sdhci_reset,
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.reset = dwcmshc_reset,
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.adma_write_desc = dwcmshc_adma_write_desc,
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.adma_write_desc = dwcmshc_adma_write_desc,
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.irq = dwcmshc_cqe_irq_handler,
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.irq = dwcmshc_cqe_irq_handler,
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};
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};
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