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x86/decompressor: Merge trampoline cleanup with switching code

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commit 03dda95137 upstream.

Now that the trampoline setup code and the actual invocation of it are
all done from the C routine, the trampoline cleanup can be merged into
it as well, instead of returning to asm just to call another C function.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Link: https://lore.kernel.org/r/20230807162720.545787-16-ardb@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ard Biesheuvel
2023-08-07 18:27:12 +02:00
committed by Greg Kroah-Hartman
parent df3dec320b
commit 463b51e90c
2 changed files with 8 additions and 24 deletions
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14
arch/x86/boot/compressed/head_64.S
View File

@@ -433,20 +433,14 @@ SYM_CODE_START(startup_64)
* a trampoline in 32-bit addressable memory if the current number does * a trampoline in 32-bit addressable memory if the current number does
* not match the desired number. * not match the desired number.
* *
* Pass the boot_params pointer as the first argument. * Pass the boot_params pointer as the first argument. The second
* argument is the relocated address of the page table to use instead
* of the page table in trampoline memory (if required).
*/ */
movq %r15, %rdi movq %r15, %rdi
leaq rva(top_pgtable)(%rbx), %rsi
call configure_5level_paging call configure_5level_paging
/*
* cleanup_trampoline() would restore trampoline memory.
*
* RDI is address of the page table to use instead of page table
* in trampoline memory (if required).
*/
leaq rva(top_pgtable)(%rbx), %rdi
call cleanup_trampoline
/* Zero EFLAGS */ /* Zero EFLAGS */
pushq $0 pushq $0
popfq popfq

18
arch/x86/boot/compressed/pgtable_64.c
View File

@@ -101,7 +101,7 @@ static unsigned long find_trampoline_placement(void)
return bios_start - TRAMPOLINE_32BIT_SIZE; return bios_start - TRAMPOLINE_32BIT_SIZE;
} }
asmlinkage void configure_5level_paging(struct boot_params *bp) asmlinkage void configure_5level_paging(struct boot_params *bp, void *pgtable)
{ {
void (*toggle_la57)(void *cr3); void (*toggle_la57)(void *cr3);
bool l5_required = false; bool l5_required = false;
@@ -191,22 +191,12 @@ asmlinkage void configure_5level_paging(struct boot_params *bp)
} }
toggle_la57(trampoline_32bit); toggle_la57(trampoline_32bit);
}
void cleanup_trampoline(void *pgtable)
{
void *trampoline_pgtable;
trampoline_pgtable = trampoline_32bit;
/* /*
* Move the top level page table out of trampoline memory, * Move the top level page table out of trampoline memory.
* if it's there.
*/ */
if ((void *)__native_read_cr3() == trampoline_pgtable) { memcpy(pgtable, trampoline_32bit, PAGE_SIZE);
memcpy(pgtable, trampoline_pgtable, PAGE_SIZE); native_write_cr3((unsigned long)pgtable);
native_write_cr3((unsigned long)pgtable);
}
/* Restore trampoline memory */ /* Restore trampoline memory */
memcpy(trampoline_32bit, trampoline_save, TRAMPOLINE_32BIT_SIZE); memcpy(trampoline_32bit, trampoline_save, TRAMPOLINE_32BIT_SIZE);