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media: i2c: imx290: Convert HMAX setting into V4L2_CID_HBLANK
Userspace needs to know HBLANK if it is to work out exposure times and frame rates, therefore convert it to map onto V4L2_CID_HBLANK Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
This commit is contained in:
committed by
popcornmix
parent
92769a095d
commit
471e0029e9
@@ -40,6 +40,9 @@ enum imx290_clk_index {
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#define IMX290_GAIN 0x3014
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#define IMX290_HMAX_LOW 0x301c
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#define IMX290_HMAX_HIGH 0x301d
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#define IMX290_HMAX_MIN_2LANE 4400 /* Min of 4400 pixels = 30fps */
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#define IMX290_HMAX_MIN_4LANE 2200 /* Min of 2200 pixels = 60fps */
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#define IMX290_HMAX_MAX 0xffff
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#define IMX290_PGCTRL 0x308c
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#define IMX290_PHY_LANE_NUM 0x3407
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#define IMX290_CSI_LANE_MODE 0x3443
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@@ -82,6 +85,7 @@ struct imx290 {
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struct regmap *regmap;
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u8 nlanes;
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u8 bpp;
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u16 hmax_min;
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struct v4l2_subdev sd;
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struct media_pad pad;
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@@ -94,6 +98,7 @@ struct imx290 {
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struct v4l2_ctrl_handler ctrls;
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struct v4l2_ctrl *link_freq;
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struct v4l2_ctrl *pixel_rate;
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struct v4l2_ctrl *hblank;
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struct mutex lock;
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};
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@@ -518,6 +523,26 @@ static int imx290_set_gain(struct imx290 *imx290, u32 value)
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return ret;
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}
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static int imx290_set_hmax(struct imx290 *imx290, u32 val)
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{
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u32 hmax = val + imx290->current_mode->width;
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int ret;
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ret = imx290_write_reg(imx290, IMX290_HMAX_LOW, (hmax & 0xff));
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if (ret) {
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dev_err(imx290->dev, "Error setting HMAX register\n");
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return ret;
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}
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ret = imx290_write_reg(imx290, IMX290_HMAX_HIGH, ((hmax >> 8) & 0xff));
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if (ret) {
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dev_err(imx290->dev, "Error setting HMAX register\n");
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return ret;
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}
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return 0;
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}
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/* Stop streaming */
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static int imx290_stop_streaming(struct imx290 *imx290)
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{
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@@ -546,6 +571,9 @@ static int imx290_set_ctrl(struct v4l2_ctrl *ctrl)
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case V4L2_CID_GAIN:
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ret = imx290_set_gain(imx290, ctrl->val);
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break;
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case V4L2_CID_HBLANK:
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ret = imx290_set_hmax(imx290, ctrl->val);
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break;
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case V4L2_CID_TEST_PATTERN:
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if (ctrl->val) {
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imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW, 0x00);
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@@ -702,6 +730,12 @@ static int imx290_set_fmt(struct v4l2_subdev *sd,
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if (imx290->pixel_rate)
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__v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate,
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imx290_calc_pixel_rate(imx290));
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if (imx290->hblank)
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__v4l2_ctrl_modify_range(imx290->hblank,
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imx290->hmax_min - mode->width,
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IMX290_HMAX_MAX - mode->width,
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1, mode->hmax - mode->width);
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}
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*format = fmt->format;
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@@ -756,25 +790,6 @@ static int imx290_write_current_format(struct imx290 *imx290)
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return 0;
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}
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static int imx290_set_hmax(struct imx290 *imx290, u32 val)
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{
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int ret;
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ret = imx290_write_reg(imx290, IMX290_HMAX_LOW, (val & 0xff));
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if (ret) {
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dev_err(imx290->dev, "Error setting HMAX register\n");
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return ret;
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}
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ret = imx290_write_reg(imx290, IMX290_HMAX_HIGH, ((val >> 8) & 0xff));
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if (ret) {
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dev_err(imx290->dev, "Error setting HMAX register\n");
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return ret;
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}
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return 0;
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}
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/* Start streaming */
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static int imx290_start_streaming(struct imx290 *imx290)
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{
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@@ -813,9 +828,6 @@ static int imx290_start_streaming(struct imx290 *imx290)
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dev_err(imx290->dev, "Could not set current mode\n");
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return ret;
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}
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ret = imx290_set_hmax(imx290, imx290->current_mode->hmax);
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if (ret < 0)
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return ret;
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/* Apply customized values from user */
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ret = v4l2_ctrl_handler_setup(imx290->sd.ctrl_handler);
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@@ -1014,6 +1026,7 @@ static int imx290_probe(struct i2c_client *client)
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struct v4l2_fwnode_endpoint ep = {
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.bus_type = V4L2_MBUS_CSI2_DPHY
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};
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const struct imx290_mode *mode;
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struct imx290 *imx290;
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s64 fq;
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int ret;
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@@ -1052,6 +1065,8 @@ static int imx290_probe(struct i2c_client *client)
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ret = -EINVAL;
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goto free_err;
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}
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imx290->hmax_min = (imx290->nlanes == 2) ? IMX290_HMAX_MIN_2LANE :
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IMX290_HMAX_MIN_4LANE;
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dev_dbg(dev, "Using %u data lanes\n", imx290->nlanes);
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@@ -1126,6 +1141,13 @@ static int imx290_probe(struct i2c_client *client)
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v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
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V4L2_CID_GAIN, 0, 238, 1, 0);
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mode = imx290->current_mode;
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imx290->hblank = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
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V4L2_CID_HBLANK,
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imx290->hmax_min - mode->width,
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IMX290_HMAX_MAX - mode->width, 1,
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mode->hmax - mode->width);
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imx290->link_freq =
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v4l2_ctrl_new_int_menu(&imx290->ctrls, &imx290_ctrl_ops,
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V4L2_CID_LINK_FREQ,
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