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drm/vc4: plane: Change LBM alignment constraint on LBM

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The HVS5 needs an alignment of 64bytes for its LBM memory, so let's reflect
it.

Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
This commit is contained in:
Dave Stevenson
2020-09-03 10:00:36 +02:00
committed by popcornmix
parent 63608aae8a
commit 4dcae2d6a6
1 changed files with 3 additions and 1 deletions
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4
drivers/gpu/drm/vc4/vc4_plane.c
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@@ -578,7 +578,9 @@ static int vc4_plane_allocate_lbm(struct drm_plane_state *state)
spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags); spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
ret = drm_mm_insert_node_generic(&vc4->hvs->lbm_mm, ret = drm_mm_insert_node_generic(&vc4->hvs->lbm_mm,
&vc4_state->lbm, &vc4_state->lbm,
lbm_size, 32, 0, 0); lbm_size,
vc4->hvs->hvs5 ? 64 : 32,
0, 0);
spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags); spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
if (ret) if (ret)