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drm/vc4: hdmi: Move clock calculation into its own function

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The code to compute our clock rate for a given setup will be called in
multiple places in the next patches, so let's create a separate function
for it.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
This commit is contained in:
Maxime Ripard
2021-12-02 17:04:18 +01:00
committed by Phil Elwell
parent 83a928f829
commit 624d93a4f0
1 changed files with 34 additions and 15 deletions
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49
drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -1262,6 +1262,35 @@ vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi,
return MODE_OK; return MODE_OK;
} }
static unsigned long long
vc4_hdmi_encoder_compute_mode_clock(const struct drm_display_mode *mode,
unsigned int bpc)
{
unsigned long long clock = mode->crtc_clock * 1000;
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
clock = clock * 2;
return clock * bpc / 8;
}
static int
vc4_hdmi_encoder_compute_clock(const struct vc4_hdmi *vc4_hdmi,
struct vc4_hdmi_connector_state *vc4_state,
const struct drm_display_mode *mode,
unsigned int bpc)
{
unsigned long long clock;
clock = vc4_hdmi_encoder_compute_mode_clock(mode, bpc);
if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, clock) != MODE_OK)
return -EINVAL;
vc4_state->pixel_rate = clock;
return 0;
}
#define WIFI_2_4GHz_CH1_MIN_FREQ 2400000000ULL #define WIFI_2_4GHz_CH1_MIN_FREQ 2400000000ULL
#define WIFI_2_4GHz_CH1_MAX_FREQ 2422000000ULL #define WIFI_2_4GHz_CH1_MAX_FREQ 2422000000ULL
@@ -1274,6 +1303,7 @@ static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder,
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder); struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long long pixel_rate = mode->clock * 1000; unsigned long long pixel_rate = mode->clock * 1000;
unsigned long long tmds_rate; unsigned long long tmds_rate;
int ret;
if (vc4_hdmi->variant->unsupported_odd_h_timings && if (vc4_hdmi->variant->unsupported_odd_h_timings &&
!(mode->flags & DRM_MODE_FLAG_DBLCLK) && !(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
@@ -1295,21 +1325,10 @@ static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder,
pixel_rate = mode->clock * 1000; pixel_rate = mode->clock * 1000;
} }
if (conn_state->max_bpc == 12) { ret = vc4_hdmi_encoder_compute_clock(vc4_hdmi, vc4_state, mode,
pixel_rate = pixel_rate * 150; conn_state->max_bpc);
do_div(pixel_rate, 100); if (ret)
} else if (conn_state->max_bpc == 10) { return ret;
pixel_rate = pixel_rate * 125;
do_div(pixel_rate, 100);
}
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
pixel_rate = pixel_rate * 2;
if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, pixel_rate) != MODE_OK)
return -EINVAL;
vc4_state->pixel_rate = pixel_rate;
return 0; return 0;
} }