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x86/msr: Use the proper trace point conditional for writes
commit08dd8cd06eupstream. The msr tracing for writes is incorrectly conditional on the read trace. Fixes:7f47d8cc03"x86, tracing, perf: Add trace point for MSR accesses" Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Cc: ak@linux.intel.com Link: http://lkml.kernel.org/r/1464976859-21850-1-git-send-email-dgilbert@redhat.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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committed by
Greg Kroah-Hartman
parent
424f68c3d4
commit
65d99663eb
@@ -112,7 +112,7 @@ static inline void native_write_msr(unsigned int msr,
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unsigned low, unsigned high)
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{
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asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory");
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if (msr_tracepoint_active(__tracepoint_read_msr))
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if (msr_tracepoint_active(__tracepoint_write_msr))
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do_trace_write_msr(msr, ((u64)high << 32 | low), 0);
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}
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@@ -131,7 +131,7 @@ notrace static inline int native_write_msr_safe(unsigned int msr,
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: "c" (msr), "0" (low), "d" (high),
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[fault] "i" (-EIO)
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: "memory");
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if (msr_tracepoint_active(__tracepoint_read_msr))
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if (msr_tracepoint_active(__tracepoint_write_msr))
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do_trace_write_msr(msr, ((u64)high << 32 | low), err);
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return err;
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}
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