drm/amd/display: more liberal vmin/vmax update for freesync

[Why]
FAMS2 expects vmin/vmax to be updated in the case when freesync is
off, but supported. But we only update it when freesync is enabled.

[How]
Change the vsync handler such that dc_stream_adjust_vmin_vmax() its called
irrespective of whether freesync is enabled. If freesync is supported,
then there is no harm in updating vmin/vmax registers.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3546
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Reviewed-by: ChiaHsuan Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Aurabindo Pillai
2025-04-16 11:26:54 -04:00
committed by Alex Deucher
parent c210b757b4
commit 6d31602a9f

View File

@@ -612,6 +612,11 @@ static void dm_vupdate_high_irq(void *interrupt_params)
* if a pageflip happened inside front-porch. * if a pageflip happened inside front-porch.
*/ */
if (vrr_active) { if (vrr_active) {
bool replay_en = acrtc->dm_irq_params.stream->link->replay_settings.replay_feature_enabled;
bool psr_en = acrtc->dm_irq_params.stream->link->psr_settings.psr_feature_enabled;
bool fs_active_var_en = acrtc->dm_irq_params.freesync_config.state
== VRR_STATE_ACTIVE_VARIABLE;
amdgpu_dm_crtc_handle_vblank(acrtc); amdgpu_dm_crtc_handle_vblank(acrtc);
/* BTR processing for pre-DCE12 ASICs */ /* BTR processing for pre-DCE12 ASICs */
@@ -623,9 +628,11 @@ static void dm_vupdate_high_irq(void *interrupt_params)
acrtc->dm_irq_params.stream, acrtc->dm_irq_params.stream,
&acrtc->dm_irq_params.vrr_params); &acrtc->dm_irq_params.vrr_params);
if (fs_active_var_en || (!fs_active_var_en && !replay_en && !psr_en)) {
schedule_dc_vmin_vmax(adev, schedule_dc_vmin_vmax(adev,
acrtc->dm_irq_params.stream, acrtc->dm_irq_params.stream,
&acrtc->dm_irq_params.vrr_params.adjust); &acrtc->dm_irq_params.vrr_params.adjust);
}
spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags);
} }
} }
@@ -708,16 +715,21 @@ static void dm_crtc_high_irq(void *interrupt_params)
spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags); spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);
if (acrtc->dm_irq_params.stream && if (acrtc->dm_irq_params.stream &&
acrtc->dm_irq_params.vrr_params.supported && acrtc->dm_irq_params.vrr_params.supported) {
acrtc->dm_irq_params.freesync_config.state == bool replay_en = acrtc->dm_irq_params.stream->link->replay_settings.replay_feature_enabled;
VRR_STATE_ACTIVE_VARIABLE) { bool psr_en = acrtc->dm_irq_params.stream->link->psr_settings.psr_feature_enabled;
bool fs_active_var_en = acrtc->dm_irq_params.freesync_config.state == VRR_STATE_ACTIVE_VARIABLE;
mod_freesync_handle_v_update(adev->dm.freesync_module, mod_freesync_handle_v_update(adev->dm.freesync_module,
acrtc->dm_irq_params.stream, acrtc->dm_irq_params.stream,
&acrtc->dm_irq_params.vrr_params); &acrtc->dm_irq_params.vrr_params);
/* update vmin_vmax only if freesync is enabled, or only if PSR and REPLAY are disabled */
if (fs_active_var_en || (!fs_active_var_en && !replay_en && !psr_en)) {
schedule_dc_vmin_vmax(adev, acrtc->dm_irq_params.stream, schedule_dc_vmin_vmax(adev, acrtc->dm_irq_params.stream,
&acrtc->dm_irq_params.vrr_params.adjust); &acrtc->dm_irq_params.vrr_params.adjust);
} }
}
/* /*
* If there aren't any active_planes then DCH HUBP may be clock-gated. * If there aren't any active_planes then DCH HUBP may be clock-gated.