dtoverlays: Fix up imx500 overlays to have unique clock nodes

The overlay was creating DT nodes /clocks/clk-aicam and
/clocks/clk-aicam-gated for both cam0 and cam1, which resulted
in one failing.

The clock infrastructure creates the clock name from the node name
without any @N reg extension, so we can't just use that. The nodes
therefore have to be renamed.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
This commit is contained in:
Dave Stevenson
2024-10-14 15:37:57 +01:00
committed by Phil Elwell
parent eac6399d92
commit 6e23f4f785
2 changed files with 12 additions and 8 deletions

View File

@@ -72,16 +72,16 @@
}; };
}; };
clocks_frag: fragment@104 { fragment@104 {
target-path = "/clocks"; target-path = "/clocks";
__overlay__ { __overlay__ {
clk_aicam: clk-aicam { clk_aicam: clk-aicam1 {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };
clk_aicam_gated: clk-aicam-gated { clk_aicam_gated: clk-aicam-gated1 {
compatible = "gpio-gate-clock"; compatible = "gpio-gate-clock";
clocks = <&clk_aicam>; clocks = <&clk_aicam>;
#clock-cells = <0>; #clock-cells = <0>;
@@ -98,7 +98,9 @@
<&csi_frag>, "target:0=",<&csi0>, <&csi_frag>, "target:0=",<&csi0>,
<&spi_bridge>, "power-supply:0=",<&cam0_reg>, <&spi_bridge>, "power-supply:0=",<&cam0_reg>,
<&reg_frag>, "target:0=",<&cam0_reg>, <&reg_frag>, "target:0=",<&cam0_reg>,
<&cam_node>, "VANA-supply:0=",<&cam0_reg>; <&cam_node>, "VANA-supply:0=",<&cam0_reg>,
<&clk_aicam>,"name=clk-aicam0",
<&clk_aicam_gated>,"name=clk-aicam-gated0";
bypass-cache = <&spi_bridge>,"bypass-cache?"; bypass-cache = <&spi_bridge>,"bypass-cache?";
}; };
}; };

View File

@@ -75,16 +75,16 @@
}; };
}; };
clocks_frag: fragment@104 { fragment@104 {
target-path = "/clocks"; target-path = "/clocks";
__overlay__ { __overlay__ {
clk_aicam: clk-aicam { clk_aicam: clk-aicam1 {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };
clk_aicam_gated: clk-aicam-gated { clk_aicam_gated: clk-aicam-gated1 {
compatible = "gpio-gate-clock"; compatible = "gpio-gate-clock";
clocks = <&clk_aicam>; clocks = <&clk_aicam>;
#clock-cells = <0>; #clock-cells = <0>;
@@ -103,7 +103,9 @@
<&spi_frag_overlay>, "fast_xfer-gpios:16=35", // CD0_IO1_MICDAT0 (clock) <&spi_frag_overlay>, "fast_xfer-gpios:16=35", // CD0_IO1_MICDAT0 (clock)
<&spi_bridge>, "power-supply:0=",<&cam0_reg>, <&spi_bridge>, "power-supply:0=",<&cam0_reg>,
<&reg_frag>, "target:0=",<&cam0_reg>, <&reg_frag>, "target:0=",<&cam0_reg>,
<&cam_node>, "VANA-supply:0=",<&cam0_reg>; <&cam_node>, "VANA-supply:0=",<&cam0_reg>,
<&clk_aicam>,"name=clk-aicam0",
<&clk_aicam_gated>,"name=clk-aicam-gated0";
bypass-cache = <&spi_bridge>,"bypass-cache?"; bypass-cache = <&spi_bridge>,"bypass-cache?";
}; };
}; };