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drm/i915/gt: Ensure memory quiesced before invalidation
All memory traffic must be quiesced before requesting an aux invalidation on platforms that use Aux CCS. Fixes:972282c4cf("drm/i915/gen12: Add aux table invalidate for all engines") Requires: a2a4aa0eef3b ("drm/i915: Add the gen12_needs_ccs_aux_inv helper") Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: <stable@vger.kernel.org> # v5.8+ Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230725001950.1014671-4-andi.shyti@linux.intel.com (cherry picked from commitad8ebf1221) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
This commit is contained in:
committed by
Tvrtko Ursulin
parent
b2f59e9026
commit
78a6ccd65f
@@ -214,7 +214,11 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
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{
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{
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struct intel_engine_cs *engine = rq->engine;
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struct intel_engine_cs *engine = rq->engine;
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if (mode & EMIT_FLUSH) {
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/*
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* On Aux CCS platforms the invalidation of the Aux
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* table requires quiescing memory traffic beforehand
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*/
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if (mode & EMIT_FLUSH || gen12_needs_ccs_aux_inv(engine)) {
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u32 flags = 0;
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u32 flags = 0;
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int err;
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int err;
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u32 *cs;
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u32 *cs;
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