Merge remote-tracking branch 'stable/linux-5.10.y' into rpi-5.10.y

This commit is contained in:
Dom Cobley
2021-08-17 19:34:57 +01:00
617 changed files with 4760 additions and 2463 deletions

View File

@@ -45,8 +45,9 @@ how the user addresses are used by the kernel:
1. User addresses not accessed by the kernel but used for address space
management (e.g. ``mprotect()``, ``madvise()``). The use of valid
tagged pointers in this context is allowed with the exception of
``brk()``, ``mmap()`` and the ``new_address`` argument to
tagged pointers in this context is allowed with these exceptions:
- ``brk()``, ``mmap()`` and the ``new_address`` argument to
``mremap()`` as these have the potential to alias with existing
user addresses.
@@ -54,6 +55,15 @@ how the user addresses are used by the kernel:
incorrectly accept valid tagged pointers for the ``brk()``,
``mmap()`` and ``mremap()`` system calls.
- The ``range.start``, ``start`` and ``dst`` arguments to the
``UFFDIO_*`` ``ioctl()``s used on a file descriptor obtained from
``userfaultfd()``, as fault addresses subsequently obtained by reading
the file descriptor will be untagged, which may otherwise confuse
tag-unaware programs.
NOTE: This behaviour changed in v5.14 and so some earlier kernels may
incorrectly accept valid tagged pointers for this system call.
2. User addresses accessed by the kernel (e.g. ``write()``). This ABI
relaxation is disabled by default and the application thread needs to
explicitly enable it via ``prctl()`` as follows:

View File

@@ -69,17 +69,17 @@ early userspace image can be built by an unprivileged user.
As a technical note, when directories and files are specified, the
entire CONFIG_INITRAMFS_SOURCE is passed to
usr/gen_initramfs_list.sh. This means that CONFIG_INITRAMFS_SOURCE
usr/gen_initramfs.sh. This means that CONFIG_INITRAMFS_SOURCE
can really be interpreted as any legal argument to
gen_initramfs_list.sh. If a directory is specified as an argument then
gen_initramfs.sh. If a directory is specified as an argument then
the contents are scanned, uid/gid translation is performed, and
usr/gen_init_cpio file directives are output. If a directory is
specified as an argument to usr/gen_initramfs_list.sh then the
specified as an argument to usr/gen_initramfs.sh then the
contents of the file are simply copied to the output. All of the output
directives from directory scanning and file contents copying are
processed by usr/gen_init_cpio.
See also 'usr/gen_initramfs_list.sh -h'.
See also 'usr/gen_initramfs.sh -h'.
Where's this all leading?
=========================

View File

@@ -170,7 +170,7 @@ Documentation/driver-api/early-userspace/early_userspace_support.rst for more de
The kernel does not depend on external cpio tools. If you specify a
directory instead of a configuration file, the kernel's build infrastructure
creates a configuration file from that directory (usr/Makefile calls
usr/gen_initramfs_list.sh), and proceeds to package up that directory
usr/gen_initramfs.sh), and proceeds to package up that directory
using the config file (by feeding it to usr/gen_init_cpio, which is created
from usr/gen_init_cpio.c). The kernel's build-time cpio creation code is
entirely self-contained, and the kernel's boot-time extractor is also

View File

@@ -751,7 +751,7 @@ tcp_fastopen_blackhole_timeout_sec - INTEGER
initial value when the blackhole issue goes away.
0 to disable the blackhole detection.
By default, it is set to 1hr.
By default, it is set to 0 (feature is disabled).
tcp_fastopen_key - list of comma separated 32-digit hexadecimal INTEGERs
The list consists of a primary key and an optional backup key. The

View File

@@ -191,7 +191,7 @@ Documentation written by Tom Zanussi
with the event, in nanoseconds. May be
modified by .usecs to have timestamps
interpreted as microseconds.
cpu int the cpu on which the event occurred.
common_cpu int the cpu on which the event occurred.
====================== ==== =======================================
Extended error information

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 10
SUBLEVEL = 52
SUBLEVEL = 59
EXTRAVERSION =
NAME = Dare mighty things
@@ -704,11 +704,12 @@ $(KCONFIG_CONFIG):
# This exploits the 'multi-target pattern rule' trick.
# The syncconfig should be executed only once to make all the targets.
# (Note: use the grouped target '&:' when we bump to GNU Make 4.3)
quiet_cmd_syncconfig = SYNC $@
cmd_syncconfig = $(MAKE) -f $(srctree)/Makefile syncconfig
#
# Do not use $(call cmd,...) here. That would suppress prompts from syncconfig,
# so you cannot notice that Kconfig is waiting for the user input.
%/config/auto.conf %/config/auto.conf.cmd %/generated/autoconf.h: $(KCONFIG_CONFIG)
+$(call cmd,syncconfig)
$(Q)$(kecho) " SYNC $@"
$(Q)$(MAKE) -f $(srctree)/Makefile syncconfig
else # !may-sync-config
# External modules and some install targets need include/generated/autoconf.h
# and include/config/auto.conf but do not care if they are up-to-date.

View File

@@ -325,18 +325,19 @@ setup_memory(void *kernel_end)
i, cluster->usage, cluster->start_pfn,
cluster->start_pfn + cluster->numpages);
/* Bit 0 is console/PALcode reserved. Bit 1 is
non-volatile memory -- we might want to mark
this for later. */
if (cluster->usage & 3)
continue;
end = cluster->start_pfn + cluster->numpages;
if (end > max_low_pfn)
max_low_pfn = end;
memblock_add(PFN_PHYS(cluster->start_pfn),
cluster->numpages << PAGE_SHIFT);
/* Bit 0 is console/PALcode reserved. Bit 1 is
non-volatile memory -- we might want to mark
this for later. */
if (cluster->usage & 3)
memblock_reserve(PFN_PHYS(cluster->start_pfn),
cluster->numpages << PAGE_SHIFT);
}
/*

View File

@@ -582,7 +582,7 @@ void
smp_send_stop(void)
{
cpumask_t to_whom;
cpumask_copy(&to_whom, cpu_possible_mask);
cpumask_copy(&to_whom, cpu_online_mask);
cpumask_clear_cpu(smp_processor_id(), &to_whom);
#ifdef DEBUG_IPI_MSG
if (hard_smp_processor_id() != boot_cpu_id)

View File

@@ -393,10 +393,10 @@
status = "okay";
};
&gpio0 {
&gpio0_target {
ti,no-reset-on-init;
};
&gpio3 {
&gpio3_target {
ti,no-reset-on-init;
};

View File

@@ -648,7 +648,7 @@
status = "okay";
};
&gpio0 {
&gpio0_target {
ti,no-reset-on-init;
};

View File

@@ -150,7 +150,7 @@
status = "okay";
};
&gpio0 {
&gpio0_target {
ti,no-reset-on-init;
};

View File

@@ -353,7 +353,7 @@
status = "okay";
};
&gpio0 {
&gpio0_target {
ti,no-reset-on-init;
};

View File

@@ -1723,7 +1723,7 @@
};
};
target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */
gpio3_target: target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0xae000 0x4>,
<0xae010 0x4>,

View File

@@ -813,11 +813,14 @@
status = "okay";
};
&gpio5_target {
ti,no-reset-on-init;
};
&gpio5 {
pinctrl-names = "default";
pinctrl-0 = <&display_mux_pins>;
status = "okay";
ti,no-reset-on-init;
p8 {
/*

View File

@@ -1576,7 +1576,7 @@
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
reg = <0x0 0x2000>;
clocks = <&dcan1_fck>;
clock-name = "fck";
clock-names = "fck";
syscon-raminit = <&scm_conf 0x644 1>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -2033,7 +2033,7 @@
};
};
target-module@22000 { /* 0x48322000, ap 116 64.0 */
gpio5_target: target-module@22000 { /* 0x48322000, ap 116 64.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x22000 0x4>,
<0x22010 0x4>,

View File

@@ -454,20 +454,20 @@
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
status = "okay";
};
};
@@ -610,12 +610,11 @@
>;
};
&gpio3 {
status = "okay";
&gpio3_target {
ti,no-reset-on-init;
};
&gpio2 {
&gpio2_target {
status = "okay";
ti,no-reset-on-init;
};

View File

@@ -156,10 +156,7 @@
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "","","","","","","","",
/*AA0-AA7*/ "","","","","","","","",
/*AB0-AB7*/ "","","","","","","","",
/*AC0-AC7*/ "","","","","","","","";
/*Z0-Z7*/ "","","","","","","","";
pin_mclr_vpp {
gpio-hog;

View File

@@ -127,10 +127,7 @@
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "","","","","","","","",
/*AA0-AA7*/ "","","","","","","","",
/*AB0-AB7*/ "","","","","","","","",
/*AC0-AC7*/ "","","","","","","","";
/*Z0-Z7*/ "","","","","","","","";
};
&fmc {
@@ -180,6 +177,7 @@
&emmc {
status = "okay";
clk-phase-mmc-hs200 = <36>, <270>;
};
&fsim0 {

View File

@@ -460,7 +460,7 @@
status = "disabled";
};
nand: nand@18046000 {
nand_controller: nand-controller@18046000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x18046000 0x600>, <0xf8105408 0x600>,
<0x18046f00 0x20>;

View File

@@ -179,7 +179,7 @@
status = "disabled";
};
nand: nand@26000 {
nand_controller: nand-controller@26000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x26000 0x600>,
<0x11b408 0x600>,

View File

@@ -269,7 +269,7 @@
dma-coherent;
};
nand: nand@26000 {
nand_controller: nand-controller@26000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x026000 0x600>,
<0x11b408 0x600>,

View File

@@ -28,11 +28,11 @@
};
leds {
act {
led-act {
gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
};
pwr {
led-pwr {
label = "PWR";
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
default-state = "keep";

View File

@@ -434,7 +434,7 @@
ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>;
dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>;
emmc2: emmc2@7e340000 {
emmc2: mmc@7e340000 {
compatible = "brcm,bcm2711-emmc2";
reg = <0x0 0x7e340000 0x100>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;

View File

@@ -14,11 +14,11 @@
};
leds {
act {
led-act {
gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
};
pwr {
led-pwr {
label = "PWR";
gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
default-state = "keep";

View File

@@ -14,7 +14,7 @@
};
leds {
act {
led-act {
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
};

View File

@@ -15,11 +15,11 @@
};
leds {
act {
led-act {
gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
};
pwr {
led-pwr {
label = "PWR";
gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
default-state = "keep";

View File

@@ -15,7 +15,7 @@
};
leds {
act {
led-act {
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
};

View File

@@ -15,7 +15,7 @@
};
leds {
act {
led-act {
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
};

View File

@@ -5,7 +5,7 @@
/ {
leds {
act {
led-act {
gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
};
};

View File

@@ -23,7 +23,7 @@
};
leds {
act {
led-act {
gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
};
};

View File

@@ -18,7 +18,7 @@
};
leds {
act {
led-act {
gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
};
};

View File

@@ -4,7 +4,7 @@
leds {
compatible = "gpio-leds";
act {
led-act {
label = "ACT";
default-state = "keep";
linux,default-trigger = "heartbeat";

View File

@@ -15,11 +15,11 @@
};
leds {
act {
led-act {
gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
};
pwr {
led-pwr {
label = "PWR";
gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
default-state = "keep";

View File

@@ -19,11 +19,11 @@
};
leds {
act {
led-act {
gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
};
pwr {
led-pwr {
label = "PWR";
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
default-state = "keep";

View File

@@ -20,11 +20,11 @@
};
leds {
act {
led-act {
gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
};
pwr {
led-pwr {
label = "PWR";
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
default-state = "keep";

View File

@@ -20,7 +20,7 @@
};
leds {
act {
led-act {
gpios = <&expgpio 2 GPIO_ACTIVE_HIGH>;
};
};

View File

@@ -14,7 +14,7 @@
* Since there is no upstream GPIO driver yet,
* remove the incomplete node.
*/
/delete-node/ act;
/delete-node/ led-act;
};
reg_3v3: fixed-regulator {

View File

@@ -444,7 +444,7 @@
status = "disabled";
};
sdhci: sdhci@7e300000 {
sdhci: mmc@7e300000 {
compatible = "brcm,bcm2835-sdhci";
reg = <0x7e300000 0x100>;
interrupts = <2 30>;

View File

@@ -203,7 +203,7 @@
status = "disabled";
};
nand: nand@2000 {
nand_controller: nand-controller@2000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";

View File

@@ -14,10 +14,10 @@
};
};
&nand {
&nand_controller {
status = "okay";
nandcs@1 {
nand@1 {
compatible = "brcm,nandcs";
reg = <1>;
nand-ecc-step-size = <512>;

View File

@@ -148,7 +148,7 @@
reg-names = "aon-ctrl", "aon-sram";
};
nand: nand@3e2800 {
nand_controller: nand-controller@3e2800 {
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -82,8 +82,8 @@
status = "okay";
};
&nand {
nandcs@1 {
&nand_controller {
nand@1 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -60,8 +60,8 @@
status = "okay";
};
&nand {
nandcs@1 {
&nand_controller {
nand@1 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -68,8 +68,8 @@
status = "okay";
};
&nand {
nandcs@1 {
&nand_controller {
nand@1 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -74,8 +74,8 @@
status = "okay";
};
&nand {
nandcs@0 {
&nand_controller {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -74,8 +74,8 @@
status = "okay";
};
&nand {
nandcs@0 {
&nand_controller {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -90,8 +90,8 @@
};
};
&nand {
nandcs@0 {
&nand_controller {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -78,8 +78,8 @@
status = "okay";
};
&nand {
nandcs@0 {
&nand_controller {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -78,8 +78,8 @@
status = "okay";
};
&nand {
nandcs@0 {
&nand_controller {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -89,8 +89,8 @@
status = "okay";
};
&nand {
nandcs@0 {
&nand_controller {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -68,8 +68,8 @@
status = "okay";
};
&nand {
nandcs@0 {
&nand_controller {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -31,10 +31,10 @@
status = "okay";
};
&nand {
&nand_controller {
status = "okay";
nandcs@0 {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-ecc-strength = <4>;

View File

@@ -74,8 +74,8 @@
status = "okay";
};
&nand {
nandcs@0 {
&nand_controller {
nand@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;

View File

@@ -351,7 +351,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
mbox_dsp: mbox_dsp {
mbox_dsp: mbox-dsp {
ti,mbox-tx = <3 0 0>;
ti,mbox-rx = <0 0 0>;
};

View File

@@ -5,17 +5,17 @@
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay";
};
};

View File

@@ -1315,7 +1315,7 @@
};
};
target-module@55000 { /* 0x48055000, ap 13 0e.0 */
gpio2_target: target-module@55000 { /* 0x48055000, ap 13 0e.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x55000 0x4>,
<0x55010 0x4>,
@@ -1348,7 +1348,7 @@
};
};
target-module@57000 { /* 0x48057000, ap 15 06.0 */
gpio3_target: target-module@57000 { /* 0x48057000, ap 15 06.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x57000 0x4>,
<0x57010 0x4>,

View File

@@ -77,12 +77,12 @@
};
&mailbox5 {
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>;
status = "disabled";
@@ -90,7 +90,7 @@
};
&mailbox6 {
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";

View File

@@ -6,7 +6,7 @@
#include "dra7-ipu-dsp-common.dtsi"
&mailbox6 {
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
status = "okay";
};
};

View File

@@ -145,12 +145,12 @@
};
&mailbox5 {
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>;
status = "disabled";
@@ -158,12 +158,12 @@
};
&mailbox6 {
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>;
status = "disabled";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>;
status = "disabled";

View File

@@ -140,7 +140,7 @@
};
};
mdio0: ethernet-phy {
mdio0: mdio {
compatible = "virtual,mdio-gpio";
/* Uses MDC and MDIO */
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */

View File

@@ -62,7 +62,7 @@
};
};
mdio0: ethernet-phy {
mdio0: mdio {
compatible = "virtual,mdio-gpio";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */

View File

@@ -56,7 +56,7 @@
};
};
mdio0: ethernet-phy {
mdio0: mdio {
compatible = "virtual,mdio-gpio";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */

View File

@@ -68,7 +68,7 @@
};
};
mdio0: ethernet-phy {
mdio0: mdio {
compatible = "virtual,mdio-gpio";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */

View File

@@ -67,7 +67,7 @@
};
};
mdio0: ethernet-phy {
mdio0: mdio {
compatible = "virtual,mdio-gpio";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */

View File

@@ -286,6 +286,7 @@
clock-names = "PCLK", "PCICLK";
pinctrl-names = "default";
pinctrl-0 = <&pci_default_pins>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;

View File

@@ -388,13 +388,13 @@
pinctrl_power_button: powerbutgrp {
fsl,pins = <
MX53_PAD_SD2_DATA2__GPIO1_13 0x1e4
MX53_PAD_SD2_DATA0__GPIO1_15 0x1e4
>;
};
pinctrl_power_out: poweroutgrp {
fsl,pins = <
MX53_PAD_SD2_DATA0__GPIO1_15 0x1e4
MX53_PAD_SD2_DATA2__GPIO1_13 0x1e4
>;
};

View File

@@ -106,6 +106,8 @@
reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <1000>;
qca,smarteee-tw-us-1g = <24>;
qca,clk-out-frequency = <125000000>;
};
};
};

View File

@@ -315,8 +315,8 @@
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1
MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1
>;
};
@@ -403,6 +403,7 @@
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
uart-has-rtscts;
status = "disabled";
};

View File

@@ -54,7 +54,13 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
phy-mode = "rgmii-id";
phy-reset-duration = <2>;
/*
* The PHY seems to require a long-enough reset duration to avoid
* some rare issues where the PHY gets stuck in an inconsistent and
* non-functional state at boot-up. 10ms proved to be fine .
*/
phy-reset-duration = <10>;
phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
status = "okay";

View File

@@ -43,6 +43,7 @@
assigned-clock-rates = <0>, <198000000>;
cap-power-off-card;
keep-power-in-suspend;
max-frequency = <25000000>;
mmc-pwrseq = <&wifi_pwrseq>;
no-1-8-v;
non-removable;

View File

@@ -597,11 +597,11 @@
#mbox-cells = <1>;
ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>;
mbox_ipu: mbox_ipu {
mbox_ipu: mbox-ipu {
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <1 0 0>;
};
mbox_dsp: mbox_dsp {
mbox_dsp: mbox-dsp {
ti,mbox-tx = <3 0 0>;
ti,mbox-rx = <2 0 0>;
};

View File

@@ -30,14 +30,6 @@
regulator-max-microvolt = <5000000>;
};
vdds_1v8_main: fixedregulator-vdds_1v8_main {
compatible = "regulator-fixed";
regulator-name = "vdds_1v8_main";
vin-supply = <&smps7_reg>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vmmcsd_fixed: fixedregulator-mmcsd {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
@@ -487,6 +479,7 @@
regulator-boot-on;
};
vdds_1v8_main:
smps7_reg: smps7 {
/* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
regulator-name = "smps7";

View File

@@ -613,11 +613,11 @@
#mbox-cells = <1>;
ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>;
mbox_ipu: mbox_ipu {
mbox_ipu: mbox-ipu {
ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <1 0 0>;
};
mbox_dsp: mbox_dsp {
mbox_dsp: mbox-dsp {
ti,mbox-tx = <3 0 0>;
ti,mbox-rx = <2 0 0>;
};

View File

@@ -390,7 +390,7 @@
};
};
sleep {
suspend {
global_pwroff: global-pwroff {
rockchip,pins = <2 RK_PA7 1 &pcfg_pull_none>;
};

View File

@@ -755,7 +755,7 @@
#address-cells = <1>;
#size-cells = <0>;
pd_vio@RK3066_PD_VIO {
power-domain@RK3066_PD_VIO {
reg = <RK3066_PD_VIO>;
clocks = <&cru ACLK_LCDC0>,
<&cru ACLK_LCDC1>,
@@ -782,7 +782,7 @@
<&qos_rga>;
};
pd_video@RK3066_PD_VIDEO {
power-domain@RK3066_PD_VIDEO {
reg = <RK3066_PD_VIDEO>;
clocks = <&cru ACLK_VDPU>,
<&cru ACLK_VEPU>,
@@ -791,7 +791,7 @@
pm_qos = <&qos_vpu>;
};
pd_gpu@RK3066_PD_GPU {
power-domain@RK3066_PD_GPU {
reg = <RK3066_PD_GPU>;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;

View File

@@ -150,16 +150,16 @@
compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
reg = <0x2000e000 0x20>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_TIMER3>, <&cru PCLK_TIMER3>;
clock-names = "timer", "pclk";
clocks = <&cru PCLK_TIMER3>, <&cru SCLK_TIMER3>;
clock-names = "pclk", "timer";
};
timer6: timer@200380a0 {
compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
reg = <0x200380a0 0x20>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_TIMER6>, <&cru PCLK_TIMER0>;
clock-names = "timer", "pclk";
clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER6>;
clock-names = "pclk", "timer";
};
i2s0: i2s@1011a000 {
@@ -699,7 +699,7 @@
#address-cells = <1>;
#size-cells = <0>;
pd_vio@RK3188_PD_VIO {
power-domain@RK3188_PD_VIO {
reg = <RK3188_PD_VIO>;
clocks = <&cru ACLK_LCDC0>,
<&cru ACLK_LCDC1>,
@@ -721,7 +721,7 @@
<&qos_rga>;
};
pd_video@RK3188_PD_VIDEO {
power-domain@RK3188_PD_VIDEO {
reg = <RK3188_PD_VIDEO>;
clocks = <&cru ACLK_VDPU>,
<&cru ACLK_VEPU>,
@@ -730,7 +730,7 @@
pm_qos = <&qos_vpu>;
};
pd_gpu@RK3188_PD_GPU {
power-domain@RK3188_PD_GPU {
reg = <RK3188_PD_GPU>;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;

View File

@@ -524,7 +524,7 @@
pinctrl-0 = <&otp_pin>;
pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_pin>;
#thermal-sensor-cells = <0>;
#thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <95000>;
status = "disabled";
};
@@ -565,10 +565,9 @@
compatible = "rockchip,iommu";
reg = <0x20020800 0x100>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vpu_mmu";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "iface";
iommu-cells = <0>;
#iommu-cells = <0>;
status = "disabled";
};
@@ -576,10 +575,9 @@
compatible = "rockchip,iommu";
reg = <0x20030480 0x40>, <0x200304c0 0x40>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vdec_mmu";
clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
clock-names = "aclk", "iface";
iommu-cells = <0>;
#iommu-cells = <0>;
status = "disabled";
};
@@ -609,7 +607,6 @@
compatible = "rockchip,iommu";
reg = <0x20053f00 0x100>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vop_mmu";
clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
@@ -630,10 +627,9 @@
compatible = "rockchip,iommu";
reg = <0x20070800 0x100>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "iep_mmu";
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
iommu-cells = <0>;
#iommu-cells = <0>;
status = "disabled";
};

View File

@@ -218,7 +218,7 @@
flash0-supply = <&vcc_flash>;
flash1-supply = <&vccio_pmu>;
gpio30-supply = <&vccio_pmu>;
gpio1830 = <&vcc_io>;
gpio1830-supply = <&vcc_io>;
lcdc-supply = <&vcc_io>;
sdcard-supply = <&vccio_sd>;
wifi-supply = <&vcc_18>;

View File

@@ -379,10 +379,10 @@
audio-supply = <&vcc_18>;
bb-supply = <&vcc_io>;
dvp-supply = <&vcc_io>;
flash0-suuply = <&vcc_18>;
flash0-supply = <&vcc_18>;
flash1-supply = <&vcc_lan>;
gpio30-supply = <&vcc_io>;
gpio1830 = <&vcc_io>;
gpio1830-supply = <&vcc_io>;
lcdc-supply = <&vcc_io>;
sdcard-supply = <&vccio_sd>;
wifi-supply = <&vcc_18>;

View File

@@ -240,8 +240,8 @@
compatible = "rockchip,rk3288-timer";
reg = <0x0 0xff810000 0x0 0x20>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&xin24m>, <&cru PCLK_TIMER>;
clock-names = "timer", "pclk";
clocks = <&cru PCLK_TIMER>, <&xin24m>;
clock-names = "pclk", "timer";
};
display-subsystem {
@@ -788,7 +788,7 @@
* *_HDMI HDMI
* *_MIPI_* MIPI
*/
pd_vio@RK3288_PD_VIO {
power-domain@RK3288_PD_VIO {
reg = <RK3288_PD_VIO>;
clocks = <&cru ACLK_IEP>,
<&cru ACLK_ISP>,
@@ -830,7 +830,7 @@
* Note: The following 3 are HEVC(H.265) clocks,
* and on the ACLK_HEVC_NIU (NOC).
*/
pd_hevc@RK3288_PD_HEVC {
power-domain@RK3288_PD_HEVC {
reg = <RK3288_PD_HEVC>;
clocks = <&cru ACLK_HEVC>,
<&cru SCLK_HEVC_CABAC>,
@@ -844,7 +844,7 @@
* (video endecoder & decoder) clocks that on the
* ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
*/
pd_video@RK3288_PD_VIDEO {
power-domain@RK3288_PD_VIDEO {
reg = <RK3288_PD_VIDEO>;
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
@@ -855,7 +855,7 @@
* Note: ACLK_GPU is the GPU clock,
* and on the ACLK_GPU_NIU (NOC).
*/
pd_gpu@RK3288_PD_GPU {
power-domain@RK3288_PD_GPU {
reg = <RK3288_PD_GPU>;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu_r>,
@@ -1593,7 +1593,7 @@
drive-strength = <12>;
};
sleep {
suspend {
global_pwroff: global-pwroff {
rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>;
};

View File

@@ -34,7 +34,7 @@
#clock-cells = <1>;
};
ab8500_gpio: ab8500-gpio {
ab8500_gpio: ab8500-gpiocontroller {
compatible = "stericsson,ab8500-gpio";
gpio-controller;
#gpio-cells = <2>;
@@ -42,15 +42,15 @@
ab8500-rtc {
compatible = "stericsson,ab8500-rtc";
interrupts = <17 IRQ_TYPE_LEVEL_HIGH
18 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
<18 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "60S", "ALARM";
};
gpadc: ab8500-gpadc {
compatible = "stericsson,ab8500-gpadc";
interrupts = <32 IRQ_TYPE_LEVEL_HIGH
39 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <32 IRQ_TYPE_LEVEL_HIGH>,
<39 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "HW_CONV_END", "SW_CONV_END";
vddadc-supply = <&ab8500_ldo_tvout_reg>;
#address-cells = <1>;
@@ -169,13 +169,13 @@
ab8500_usb {
compatible = "stericsson,ab8500-usb";
interrupts = < 90 IRQ_TYPE_LEVEL_HIGH
96 IRQ_TYPE_LEVEL_HIGH
14 IRQ_TYPE_LEVEL_HIGH
15 IRQ_TYPE_LEVEL_HIGH
79 IRQ_TYPE_LEVEL_HIGH
74 IRQ_TYPE_LEVEL_HIGH
75 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <90 IRQ_TYPE_LEVEL_HIGH>,
<96 IRQ_TYPE_LEVEL_HIGH>,
<14 IRQ_TYPE_LEVEL_HIGH>,
<15 IRQ_TYPE_LEVEL_HIGH>,
<79 IRQ_TYPE_LEVEL_HIGH>,
<74 IRQ_TYPE_LEVEL_HIGH>,
<75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ID_WAKEUP_R",
"ID_WAKEUP_F",
"VBUS_DET_F",
@@ -192,8 +192,8 @@
ab8500-ponkey {
compatible = "stericsson,ab8500-poweron-key";
interrupts = <6 IRQ_TYPE_LEVEL_HIGH
7 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH>,
<7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
};

View File

@@ -30,7 +30,7 @@
#clock-cells = <1>;
};
ab8505_gpio: ab8505-gpio {
ab8505_gpio: ab8505-gpiocontroller {
compatible = "stericsson,ab8505-gpio";
gpio-controller;
#gpio-cells = <2>;
@@ -38,8 +38,8 @@
ab8500-rtc {
compatible = "stericsson,ab8500-rtc";
interrupts = <17 IRQ_TYPE_LEVEL_HIGH
18 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
<18 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "60S", "ALARM";
};
@@ -131,13 +131,13 @@
ab8500_usb: ab8500_usb {
compatible = "stericsson,ab8500-usb";
interrupts = < 90 IRQ_TYPE_LEVEL_HIGH
96 IRQ_TYPE_LEVEL_HIGH
14 IRQ_TYPE_LEVEL_HIGH
15 IRQ_TYPE_LEVEL_HIGH
79 IRQ_TYPE_LEVEL_HIGH
74 IRQ_TYPE_LEVEL_HIGH
75 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <90 IRQ_TYPE_LEVEL_HIGH>,
<96 IRQ_TYPE_LEVEL_HIGH>,
<14 IRQ_TYPE_LEVEL_HIGH>,
<15 IRQ_TYPE_LEVEL_HIGH>,
<79 IRQ_TYPE_LEVEL_HIGH>,
<74 IRQ_TYPE_LEVEL_HIGH>,
<75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ID_WAKEUP_R",
"ID_WAKEUP_F",
"VBUS_DET_F",
@@ -154,8 +154,8 @@
ab8500-ponkey {
compatible = "stericsson,ab8500-poweron-key";
interrupts = <6 IRQ_TYPE_LEVEL_HIGH
7 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH>,
<7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
};

View File

@@ -9,7 +9,7 @@
soc {
prcmu@80157000 {
ab8500 {
ab8500-gpio {
ab8500-gpiocontroller {
/* Hog a few default settings */
pinctrl-names = "default";
pinctrl-0 = <&gpio2_default_mode>,

View File

@@ -19,6 +19,9 @@
<19 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&accel_tvk_mode>;
mount-matrix = "0", "-1", "0",
"-1", "0", "0",
"0", "0", "-1";
};
magnetometer@1e {
compatible = "st,lsm303dlm-magn";

View File

@@ -224,7 +224,7 @@
prcmu@80157000 {
ab8500 {
ab8500-gpio {
ab8500-gpiocontroller {
};
ab8500_usb {

View File

@@ -376,7 +376,7 @@
prcmu@80157000 {
ab8500 {
ab8500-gpio {
ab8500-gpiocontroller {
/*
* AB8500 GPIOs are numbered starting from 1, so the first
* index 0 is what in the datasheet is called "GPIO1", and

View File

@@ -119,17 +119,15 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "Wake up";
linux,code = <KEY_WAKEUP>;
gpios = <&gpioa 0 0>;
};
button@1 {
button-1 {
label = "Tamper";
linux,code = <KEY_RESTART>;
gpios = <&gpioc 13 0>;

View File

@@ -81,12 +81,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "Wake up";
linux,code = <KEY_WAKEUP>;
gpios = <&gpioc 13 0>;

View File

@@ -81,12 +81,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "User";
linux,code = <KEY_HOME>;
gpios = <&gpioa 0 0>;

View File

@@ -283,8 +283,6 @@
};
timers13: timers@40001c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40001C00 0x400>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
@@ -299,8 +297,6 @@
};
timers14: timers@40002000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40002000 0x400>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
@@ -633,8 +629,6 @@
};
timers10: timers@40014400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014400 0x400>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
@@ -649,8 +643,6 @@
};
timers11: timers@40014800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014800 0x400>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;
@@ -709,7 +701,7 @@
status = "disabled";
};
rcc: rcc@40023810 {
rcc: rcc@40023800 {
#reset-cells = <1>;
#clock-cells = <2>;
compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";

View File

@@ -104,12 +104,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "User";
linux,code = <KEY_WAKEUP>;
gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;

View File

@@ -265,8 +265,6 @@
};
timers13: timers@40001c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40001C00 0x400>;
clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
@@ -281,8 +279,6 @@
};
timers14: timers@40002000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40002000 0x400>;
clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
@@ -364,9 +360,9 @@
status = "disabled";
};
i2c3: i2c@40005C00 {
i2c3: i2c@40005c00 {
compatible = "st,stm32f7-i2c";
reg = <0x40005C00 0x400>;
reg = <0x40005c00 0x400>;
interrupts = <72>,
<73>;
resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
@@ -531,8 +527,6 @@
};
timers10: timers@40014400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014400 0x400>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
@@ -547,8 +541,6 @@
};
timers11: timers@40014800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014800 0x400>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;

View File

@@ -75,12 +75,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "User";
linux,code = <KEY_HOME>;
gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;

View File

@@ -454,8 +454,6 @@
};
lptimer4: timer@58002c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x58002c00 0x400>;
clocks = <&rcc LPTIM4_CK>;
@@ -470,8 +468,6 @@
};
lptimer5: timer@58003000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x58003000 0x400>;
clocks = <&rcc LPTIM5_CK>;

View File

@@ -1395,12 +1395,6 @@
status = "disabled";
};
stmmac_axi_config_0: stmmac-axi-config {
snps,wr_osr_lmt = <0x7>;
snps,rd_osr_lmt = <0x7>;
snps,blen = <0 0 0 0 16 8 4>;
};
ethernet0: ethernet@5800a000 {
compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
reg = <0x5800a000 0x2000>;
@@ -1424,6 +1418,12 @@
snps,axi-config = <&stmmac_axi_config_0>;
snps,tso;
status = "disabled";
stmmac_axi_config_0: stmmac-axi-config {
snps,wr_osr_lmt = <0x7>;
snps,rd_osr_lmt = <0x7>;
snps,blen = <0 0 0 0 16 8 4>;
};
};
usbh_ohci: usbh-ohci@5800c000 {

View File

@@ -184,8 +184,6 @@
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>;
};
@@ -208,7 +206,6 @@
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
regulator-over-current-protection;
};
bst_out: boost {
@@ -219,13 +216,13 @@
vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg";
interrupts = <IT_OCP_OTG 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
};

View File

@@ -173,8 +173,6 @@
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>;
};
@@ -197,7 +195,6 @@
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
regulator-over-current-protection;
};
bst_out: boost {
@@ -213,7 +210,7 @@
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
};
@@ -269,7 +266,7 @@
st,neg-edge;
bus-width = <8>;
vmmc-supply = <&v3v3>;
vqmmc-supply = <&v3v3>;
vqmmc-supply = <&vdd>;
mmc-ddr-3_3v;
status = "okay";
};

View File

@@ -64,7 +64,7 @@
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
cd-gpios = <&gpioi 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,neg-edge;
bus-width = <4>;

View File

@@ -34,11 +34,10 @@
gpio-keys-polled {
compatible = "gpio-keys-polled";
#size-cells = <0>;
poll-interval = <20>;
/*
* The EXTi IRQ line 3 is shared with touchscreen and ethernet,
* The EXTi IRQ line 3 is shared with ethernet,
* so mark this as polled GPIO key.
*/
button-0 {
@@ -47,6 +46,16 @@
gpios = <&gpiof 3 GPIO_ACTIVE_LOW>;
};
/*
* The EXTi IRQ line 6 is shared with touchscreen,
* so mark this as polled GPIO key.
*/
button-1 {
label = "TA2-GPIO-B";
linux,code = <KEY_B>;
gpios = <&gpiod 6 GPIO_ACTIVE_LOW>;
};
/*
* The EXTi IRQ line 0 is shared with PMIC,
* so mark this as polled GPIO key.
@@ -60,14 +69,6 @@
gpio-keys {
compatible = "gpio-keys";
#size-cells = <0>;
button-1 {
label = "TA2-GPIO-B";
linux,code = <KEY_B>;
gpios = <&gpiod 6 GPIO_ACTIVE_LOW>;
wakeup-source;
};
button-3 {
label = "TA4-GPIO-D";
@@ -84,6 +85,7 @@
label = "green:led5";
gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>;
default-state = "off";
status = "disabled";
};
led-1 {
@@ -184,12 +186,11 @@
};
polytouch@38 {
compatible = "edt,edt-ft5x06";
touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
interrupt-parent = <&gpiog>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
linux,wakeup;
interrupt-parent = <&gpioc>;
interrupts = <6 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
};
};

View File

@@ -133,6 +133,7 @@
reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
reset-assert-us = <500>;
reset-deassert-us = <500>;
smsc,disable-energy-detect;
interrupt-parent = <&gpioi>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
};
@@ -234,8 +235,6 @@
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>;
};
@@ -257,7 +256,6 @@
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
regulator-over-current-protection;
};
bst_out: boost {
@@ -273,7 +271,7 @@
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
};
@@ -338,7 +336,7 @@
#size-cells = <0>;
status = "okay";
flash0: mx66l51235l@0 {
flash0: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-rx-bus-width = <4>;

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