Main bcm2708/bcm2709 linux port

Signed-off-by: popcornmix <popcornmix@gmail.com>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>

bcm2709: Drop platform smp and timer init code

irq-bcm2836 handles this through these functions:
bcm2835_init_local_timer_frequency()
bcm2836_arm_irqchip_smp_init()

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>

bcm270x: Use watchdog for reboot/poweroff

The watchdog driver already has support for reboot/poweroff.
Make use of this and remove the code from the platform files.

Signed-off-by: Noralf Trønnes <noralf@tronnes.org>

board_bcm2835: Remove coherent dma pool increase - API has gone
This commit is contained in:
popcornmix
2013-05-12 12:24:19 +01:00
committed by Dom Cobley
parent 9f1d858771
commit 9b69b3df43
4 changed files with 35 additions and 6 deletions

View File

@@ -162,6 +162,7 @@ config ARCH_BCM2835
select PINCTRL select PINCTRL
select PINCTRL_BCM2835 select PINCTRL_BCM2835
select MFD_CORE select MFD_CORE
select MFD_SYSCON if ARCH_MULTI_V7
help help
This enables support for the Broadcom BCM2711 and BCM283x SoCs. This enables support for the Broadcom BCM2711 and BCM283x SoCs.
This SoC is used in the Raspberry Pi and Roku 2 devices. This SoC is used in the Raspberry Pi and Roku 2 devices.

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@@ -72,10 +72,19 @@ ENDPROC(cpu_v6_reset)
* *
* IRQs are already disabled. * IRQs are already disabled.
*/ */
/* See jira SW-5991 for details of this workaround */
ENTRY(cpu_v6_do_idle) ENTRY(cpu_v6_do_idle)
mov r1, #0 .align 5
mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode mov r1, #2
mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt 1: subs r1, #1
nop
mcreq p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
mcreq p15, 0, r1, c7, c0, 4 @ wait for interrupt
nop
nop
nop
bne 1b
ret lr ret lr
ENTRY(cpu_v6_dcache_clean_area) ENTRY(cpu_v6_dcache_clean_area)

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@@ -43,7 +43,9 @@
#include <linux/irqdomain.h> #include <linux/irqdomain.h>
#include <asm/exception.h> #include <asm/exception.h>
#ifndef CONFIG_ARM64
#include <asm/mach/irq.h> #include <asm/mach/irq.h>
#endif
/* Put the bank and irq (32 bits) into the hwirq */ /* Put the bank and irq (32 bits) into the hwirq */
#define MAKE_HWIRQ(b, n) (((b) << 5) | (n)) #define MAKE_HWIRQ(b, n) (((b) << 5) | (n))
@@ -72,6 +74,7 @@
#define NR_BANKS 3 #define NR_BANKS 3
#define IRQS_PER_BANK 32 #define IRQS_PER_BANK 32
#define NUMBER_IRQS MAKE_HWIRQ(NR_BANKS, 0) #define NUMBER_IRQS MAKE_HWIRQ(NR_BANKS, 0)
#undef FIQ_START
#define FIQ_START (NR_IRQS_BANK0 + MAKE_HWIRQ(NR_BANKS - 1, 0)) #define FIQ_START (NR_IRQS_BANK0 + MAKE_HWIRQ(NR_BANKS - 1, 0))
static const int reg_pending[] __initconst = { 0x00, 0x04, 0x08 }; static const int reg_pending[] __initconst = { 0x00, 0x04, 0x08 };
@@ -253,10 +256,12 @@ static int __init armctrl_of_init(struct device_node *node,
MAKE_HWIRQ(b, i) + NUMBER_IRQS); MAKE_HWIRQ(b, i) + NUMBER_IRQS);
BUG_ON(irq <= 0); BUG_ON(irq <= 0);
irq_set_chip(irq, &armctrl_chip); irq_set_chip(irq, &armctrl_chip);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); irq_set_probe(irq);
} }
} }
#ifndef CONFIG_ARM64
init_FIQ(FIQ_START); init_FIQ(FIQ_START);
#endif
return 0; return 0;
} }

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@@ -45,12 +45,15 @@
#define MAIL1_WRT (ARM_0_MAIL1 + 0x00) #define MAIL1_WRT (ARM_0_MAIL1 + 0x00)
#define MAIL1_STA (ARM_0_MAIL1 + 0x18) #define MAIL1_STA (ARM_0_MAIL1 + 0x18)
/* On ARCH_BCM270x these come through <linux/interrupt.h> (arm_control.h ) */
#ifndef ARM_MS_FULL
/* Status register: FIFO state. */ /* Status register: FIFO state. */
#define ARM_MS_FULL BIT(31) #define ARM_MS_FULL BIT(31)
#define ARM_MS_EMPTY BIT(30) #define ARM_MS_EMPTY BIT(30)
/* Configuration register: Enable interrupts. */ /* Configuration register: Enable interrupts. */
#define ARM_MC_IHAVEDATAIRQEN BIT(0) #define ARM_MC_IHAVEDATAIRQEN BIT(0)
#endif
struct bcm2835_mbox { struct bcm2835_mbox {
void __iomem *regs; void __iomem *regs;
@@ -144,7 +147,7 @@ static int bcm2835_mbox_probe(struct platform_device *pdev)
return -ENOMEM; return -ENOMEM;
spin_lock_init(&mbox->lock); spin_lock_init(&mbox->lock);
ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0), ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
bcm2835_mbox_irq, 0, dev_name(dev), mbox); bcm2835_mbox_irq, 0, dev_name(dev), mbox);
if (ret) { if (ret) {
dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n", dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
@@ -192,7 +195,18 @@ static struct platform_driver bcm2835_mbox_driver = {
}, },
.probe = bcm2835_mbox_probe, .probe = bcm2835_mbox_probe,
}; };
module_platform_driver(bcm2835_mbox_driver);
static int __init bcm2835_mbox_init(void)
{
return platform_driver_register(&bcm2835_mbox_driver);
}
arch_initcall(bcm2835_mbox_init);
static void __init bcm2835_mbox_exit(void)
{
platform_driver_unregister(&bcm2835_mbox_driver);
}
module_exit(bcm2835_mbox_exit);
MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>"); MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
MODULE_DESCRIPTION("BCM2835 mailbox IPC driver"); MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");