raspi/linux
1
0
Fork 1
mirror of https://github.com/raspberrypi/linux.git synced 2025-12-07 18:40:10 +00:00
Code Issues Projects Releases Wiki Activity

xtensa: fix xtensa_wsr always writing 0

Browse Source 
The commit cad6fade6e ("xtensa: clean up WSR*/RSR*/get_sr/set_sr")
replaced 'WSR' macro in the function xtensa_wsr with 'xtensa_set_sr',
but variable 'v' in the xtensa_set_sr body shadowed the argument 'v'
passed to it, resulting in wrong value written to debug registers.

Fix that by removing intermediate variable from the xtensa_set_sr
macro body.

Cc: stable@vger.kernel.org
Fixes: cad6fade6e ("xtensa: clean up WSR*/RSR*/get_sr/set_sr")
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov
2022-03-20 09:40:14 -07:00
parent 7dc0eb0b6d
commit a3d0245c58
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/xtensa/include/asm/processor.h
View File

@@ -242,8 +242,8 @@ extern unsigned long __get_wchan(struct task_struct *p);
#define xtensa_set_sr(x, sr) \ #define xtensa_set_sr(x, sr) \
({ \ ({ \
unsigned int v = (unsigned int)(x); \ __asm__ __volatile__ ("wsr %0, "__stringify(sr) :: \
__asm__ __volatile__ ("wsr %0, "__stringify(sr) :: "a"(v)); \ "a"((unsigned int)(x))); \
}) })
#define xtensa_get_sr(sr) \ #define xtensa_get_sr(sr) \