From a4a49b4470d02baf10aea74d7f120a8398fb0277 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 18 Sep 2025 18:07:14 +0100 Subject: [PATCH] media: i2c: imx477: Extract more registers from mode tables to common There are a fair number of registers duplicated in all the mode tables, so move those into the common table. Signed-off-by: Dave Stevenson --- drivers/media/i2c/imx477.c | 206 ++++++++----------------------------- 1 file changed, 43 insertions(+), 163 deletions(-) diff --git a/drivers/media/i2c/imx477.c b/drivers/media/i2c/imx477.c index d0aca38103ae..05a5832e02a7 100644 --- a/drivers/media/i2c/imx477.c +++ b/drivers/media/i2c/imx477.c @@ -564,6 +564,49 @@ static const struct cci_reg_sequence mode_common_regs[] = { {CCI_REG8(0x0350), 0x00}, {CCI_REG8(0xbcf1), 0x02}, {CCI_REG8(0x3ff9), 0x01}, + {CCI_REG8(0x0220), 0x00}, + {CCI_REG8(0x0221), 0x11}, + {CCI_REG8(0x0381), 0x01}, + {CCI_REG8(0x0383), 0x01}, + {CCI_REG8(0x0385), 0x01}, + {CCI_REG8(0x0387), 0x01}, + {CCI_REG8(0x0902), 0x02}, + {CCI_REG8(0x3140), 0x02}, + {CCI_REG8(0x3c00), 0x00}, + {CCI_REG8(0x9e9a), 0x2f}, + {CCI_REG8(0x9e9b), 0x2f}, + {CCI_REG8(0x9e9c), 0x2f}, + {CCI_REG8(0x9e9d), 0x00}, + {CCI_REG8(0x9e9e), 0x00}, + {CCI_REG8(0x9e9f), 0x00}, + {CCI_REG8(0x0301), 0x05}, + {CCI_REG8(0x0303), 0x02}, + {CCI_REG8(0x030b), 0x02}, + {CCI_REG8(0x030d), 0x02}, + {CCI_REG8(0x0310), 0x01}, + {CCI_REG8(0x0820), 0x07}, + {CCI_REG8(0x0821), 0x08}, + {CCI_REG8(0x0822), 0x00}, + {CCI_REG8(0x0823), 0x00}, + {CCI_REG8(0x080a), 0x00}, + {CCI_REG8(0x080b), 0x7f}, + {CCI_REG8(0x080c), 0x00}, + {CCI_REG8(0x080d), 0x4f}, + {CCI_REG8(0x080e), 0x00}, + {CCI_REG8(0x080f), 0x77}, + {CCI_REG8(0x0810), 0x00}, + {CCI_REG8(0x0811), 0x5f}, + {CCI_REG8(0x0812), 0x00}, + {CCI_REG8(0x0813), 0x57}, + {CCI_REG8(0x0814), 0x00}, + {CCI_REG8(0x0815), 0x4f}, + {CCI_REG8(0x0816), 0x01}, + {CCI_REG8(0x0817), 0x27}, + {CCI_REG8(0x0818), 0x00}, + {CCI_REG8(0x0819), 0x3f}, + {CCI_REG8(0x3e20), 0x01}, + {CCI_REG8(0x3e37), 0x00}, + {CCI_REG8(0x3f50), 0x00}, }; /* 12 mpix 10fps */ @@ -582,17 +625,8 @@ static const struct cci_reg_sequence mode_4056x3040_regs[] = { {CCI_REG8(0x00fd), 0x0a}, {CCI_REG8(0x00fe), 0x0a}, {CCI_REG8(0x00ff), 0x0a}, - {CCI_REG8(0x0220), 0x00}, - {CCI_REG8(0x0221), 0x11}, - {CCI_REG8(0x0381), 0x01}, - {CCI_REG8(0x0383), 0x01}, - {CCI_REG8(0x0385), 0x01}, - {CCI_REG8(0x0387), 0x01}, {CCI_REG8(0x0900), 0x00}, {CCI_REG8(0x0901), 0x11}, - {CCI_REG8(0x0902), 0x02}, - {CCI_REG8(0x3140), 0x02}, - {CCI_REG8(0x3c00), 0x00}, {CCI_REG8(0x3c01), 0x03}, {CCI_REG8(0x3c02), 0xa2}, {CCI_REG8(0x3f0d), 0x01}, @@ -611,12 +645,6 @@ static const struct cci_reg_sequence mode_4056x3040_regs[] = { {CCI_REG8(0x936d), 0x28}, {CCI_REG8(0x9304), 0x00}, {CCI_REG8(0x9305), 0x00}, - {CCI_REG8(0x9e9a), 0x2f}, - {CCI_REG8(0x9e9b), 0x2f}, - {CCI_REG8(0x9e9c), 0x2f}, - {CCI_REG8(0x9e9d), 0x00}, - {CCI_REG8(0x9e9e), 0x00}, - {CCI_REG8(0x9e9f), 0x00}, {CCI_REG8(0xa2a9), 0x60}, {CCI_REG8(0xa2b7), 0x00}, {CCI_REG8(0x0401), 0x00}, @@ -634,42 +662,14 @@ static const struct cci_reg_sequence mode_4056x3040_regs[] = { {CCI_REG8(0x034d), 0xd8}, {CCI_REG8(0x034e), 0x0b}, {CCI_REG8(0x034f), 0xe0}, - {CCI_REG8(0x0301), 0x05}, - {CCI_REG8(0x0303), 0x02}, {CCI_REG8(0x0305), 0x04}, {CCI_REG8(0x0306), 0x01}, {CCI_REG8(0x0307), 0x5e}, {CCI_REG8(0x0309), 0x0c}, - {CCI_REG8(0x030b), 0x02}, - {CCI_REG8(0x030d), 0x02}, - {CCI_REG8(0x0310), 0x01}, - {CCI_REG8(0x0820), 0x07}, - {CCI_REG8(0x0821), 0x08}, - {CCI_REG8(0x0822), 0x00}, - {CCI_REG8(0x0823), 0x00}, - {CCI_REG8(0x080a), 0x00}, - {CCI_REG8(0x080b), 0x7f}, - {CCI_REG8(0x080c), 0x00}, - {CCI_REG8(0x080d), 0x4f}, - {CCI_REG8(0x080e), 0x00}, - {CCI_REG8(0x080f), 0x77}, - {CCI_REG8(0x0810), 0x00}, - {CCI_REG8(0x0811), 0x5f}, - {CCI_REG8(0x0812), 0x00}, - {CCI_REG8(0x0813), 0x57}, - {CCI_REG8(0x0814), 0x00}, - {CCI_REG8(0x0815), 0x4f}, - {CCI_REG8(0x0816), 0x01}, - {CCI_REG8(0x0817), 0x27}, - {CCI_REG8(0x0818), 0x00}, - {CCI_REG8(0x0819), 0x3f}, {CCI_REG8(0xe04c), 0x00}, {CCI_REG8(0xe04d), 0x7f}, {CCI_REG8(0xe04e), 0x00}, {CCI_REG8(0xe04f), 0x1f}, - {CCI_REG8(0x3e20), 0x01}, - {CCI_REG8(0x3e37), 0x00}, - {CCI_REG8(0x3f50), 0x00}, {CCI_REG8(0x3f56), 0x02}, {CCI_REG8(0x3f57), 0xae}, }; @@ -684,17 +684,8 @@ static const struct cci_reg_sequence mode_2028x1520_regs[] = { {CCI_REG8(0x0349), 0xd7}, {CCI_REG8(0x034a), 0x0b}, {CCI_REG8(0x034b), 0xdf}, - {CCI_REG8(0x0220), 0x00}, - {CCI_REG8(0x0221), 0x11}, - {CCI_REG8(0x0381), 0x01}, - {CCI_REG8(0x0383), 0x01}, - {CCI_REG8(0x0385), 0x01}, - {CCI_REG8(0x0387), 0x01}, {CCI_REG8(0x0900), 0x01}, {CCI_REG8(0x0901), 0x22}, - {CCI_REG8(0x0902), 0x02}, - {CCI_REG8(0x3140), 0x02}, - {CCI_REG8(0x3c00), 0x00}, {CCI_REG8(0x3c01), 0x03}, {CCI_REG8(0x3c02), 0xa2}, {CCI_REG8(0x3f0d), 0x01}, @@ -708,12 +699,6 @@ static const struct cci_reg_sequence mode_2028x1520_regs[] = { {CCI_REG8(0x936d), 0x5f}, {CCI_REG8(0x9304), 0x00}, {CCI_REG8(0x9305), 0x00}, - {CCI_REG8(0x9e9a), 0x2f}, - {CCI_REG8(0x9e9b), 0x2f}, - {CCI_REG8(0x9e9c), 0x2f}, - {CCI_REG8(0x9e9d), 0x00}, - {CCI_REG8(0x9e9e), 0x00}, - {CCI_REG8(0x9e9f), 0x00}, {CCI_REG8(0xa2a9), 0x60}, {CCI_REG8(0xa2b7), 0x00}, {CCI_REG8(0x0401), 0x00}, @@ -731,42 +716,14 @@ static const struct cci_reg_sequence mode_2028x1520_regs[] = { {CCI_REG8(0x034d), 0xec}, {CCI_REG8(0x034e), 0x05}, {CCI_REG8(0x034f), 0xf0}, - {CCI_REG8(0x0301), 0x05}, - {CCI_REG8(0x0303), 0x02}, {CCI_REG8(0x0305), 0x04}, {CCI_REG8(0x0306), 0x01}, {CCI_REG8(0x0307), 0x5e}, {CCI_REG8(0x0309), 0x0c}, - {CCI_REG8(0x030b), 0x02}, - {CCI_REG8(0x030d), 0x02}, - {CCI_REG8(0x0310), 0x01}, - {CCI_REG8(0x0820), 0x07}, - {CCI_REG8(0x0821), 0x08}, - {CCI_REG8(0x0822), 0x00}, - {CCI_REG8(0x0823), 0x00}, - {CCI_REG8(0x080a), 0x00}, - {CCI_REG8(0x080b), 0x7f}, - {CCI_REG8(0x080c), 0x00}, - {CCI_REG8(0x080d), 0x4f}, - {CCI_REG8(0x080e), 0x00}, - {CCI_REG8(0x080f), 0x77}, - {CCI_REG8(0x0810), 0x00}, - {CCI_REG8(0x0811), 0x5f}, - {CCI_REG8(0x0812), 0x00}, - {CCI_REG8(0x0813), 0x57}, - {CCI_REG8(0x0814), 0x00}, - {CCI_REG8(0x0815), 0x4f}, - {CCI_REG8(0x0816), 0x01}, - {CCI_REG8(0x0817), 0x27}, - {CCI_REG8(0x0818), 0x00}, - {CCI_REG8(0x0819), 0x3f}, {CCI_REG8(0xe04c), 0x00}, {CCI_REG8(0xe04d), 0x7f}, {CCI_REG8(0xe04e), 0x00}, {CCI_REG8(0xe04f), 0x1f}, - {CCI_REG8(0x3e20), 0x01}, - {CCI_REG8(0x3e37), 0x00}, - {CCI_REG8(0x3f50), 0x00}, {CCI_REG8(0x3f56), 0x01}, {CCI_REG8(0x3f57), 0x6c}, }; @@ -781,17 +738,8 @@ static const struct cci_reg_sequence mode_2028x1080_regs[] = { {CCI_REG8(0x0349), 0xd7}, {CCI_REG8(0x034a), 0x0a}, {CCI_REG8(0x034b), 0x27}, - {CCI_REG8(0x0220), 0x00}, - {CCI_REG8(0x0221), 0x11}, - {CCI_REG8(0x0381), 0x01}, - {CCI_REG8(0x0383), 0x01}, - {CCI_REG8(0x0385), 0x01}, - {CCI_REG8(0x0387), 0x01}, {CCI_REG8(0x0900), 0x01}, {CCI_REG8(0x0901), 0x22}, - {CCI_REG8(0x0902), 0x02}, - {CCI_REG8(0x3140), 0x02}, - {CCI_REG8(0x3c00), 0x00}, {CCI_REG8(0x3c01), 0x03}, {CCI_REG8(0x3c02), 0xa2}, {CCI_REG8(0x3f0d), 0x01}, @@ -805,12 +753,6 @@ static const struct cci_reg_sequence mode_2028x1080_regs[] = { {CCI_REG8(0x936d), 0x5f}, {CCI_REG8(0x9304), 0x00}, {CCI_REG8(0x9305), 0x00}, - {CCI_REG8(0x9e9a), 0x2f}, - {CCI_REG8(0x9e9b), 0x2f}, - {CCI_REG8(0x9e9c), 0x2f}, - {CCI_REG8(0x9e9d), 0x00}, - {CCI_REG8(0x9e9e), 0x00}, - {CCI_REG8(0x9e9f), 0x00}, {CCI_REG8(0xa2a9), 0x60}, {CCI_REG8(0xa2b7), 0x00}, {CCI_REG8(0x0401), 0x00}, @@ -828,42 +770,14 @@ static const struct cci_reg_sequence mode_2028x1080_regs[] = { {CCI_REG8(0x034d), 0xec}, {CCI_REG8(0x034e), 0x04}, {CCI_REG8(0x034f), 0x38}, - {CCI_REG8(0x0301), 0x05}, - {CCI_REG8(0x0303), 0x02}, {CCI_REG8(0x0305), 0x04}, {CCI_REG8(0x0306), 0x01}, {CCI_REG8(0x0307), 0x5e}, {CCI_REG8(0x0309), 0x0c}, - {CCI_REG8(0x030b), 0x02}, - {CCI_REG8(0x030d), 0x02}, - {CCI_REG8(0x0310), 0x01}, - {CCI_REG8(0x0820), 0x07}, - {CCI_REG8(0x0821), 0x08}, - {CCI_REG8(0x0822), 0x00}, - {CCI_REG8(0x0823), 0x00}, - {CCI_REG8(0x080a), 0x00}, - {CCI_REG8(0x080b), 0x7f}, - {CCI_REG8(0x080c), 0x00}, - {CCI_REG8(0x080d), 0x4f}, - {CCI_REG8(0x080e), 0x00}, - {CCI_REG8(0x080f), 0x77}, - {CCI_REG8(0x0810), 0x00}, - {CCI_REG8(0x0811), 0x5f}, - {CCI_REG8(0x0812), 0x00}, - {CCI_REG8(0x0813), 0x57}, - {CCI_REG8(0x0814), 0x00}, - {CCI_REG8(0x0815), 0x4f}, - {CCI_REG8(0x0816), 0x01}, - {CCI_REG8(0x0817), 0x27}, - {CCI_REG8(0x0818), 0x00}, - {CCI_REG8(0x0819), 0x3f}, {CCI_REG8(0xe04c), 0x00}, {CCI_REG8(0xe04d), 0x7f}, {CCI_REG8(0xe04e), 0x00}, {CCI_REG8(0xe04f), 0x1f}, - {CCI_REG8(0x3e20), 0x01}, - {CCI_REG8(0x3e37), 0x00}, - {CCI_REG8(0x3f50), 0x00}, {CCI_REG8(0x3f56), 0x01}, {CCI_REG8(0x3f57), 0x6c}, }; @@ -931,12 +845,6 @@ static const struct cci_reg_sequence mode_1332x990_regs[] = { {CCI_REG8(0x936d), 0x5f}, {CCI_REG8(0x9304), 0x03}, {CCI_REG8(0x9305), 0x80}, - {CCI_REG8(0x9e9a), 0x2f}, - {CCI_REG8(0x9e9b), 0x2f}, - {CCI_REG8(0x9e9c), 0x2f}, - {CCI_REG8(0x9e9d), 0x00}, - {CCI_REG8(0x9e9e), 0x00}, - {CCI_REG8(0x9e9f), 0x00}, {CCI_REG8(0xa2a9), 0x27}, {CCI_REG8(0xa2b7), 0x03}, {CCI_REG8(0x0401), 0x00}, @@ -954,42 +862,14 @@ static const struct cci_reg_sequence mode_1332x990_regs[] = { {CCI_REG8(0x034d), 0x34}, {CCI_REG8(0x034e), 0x03}, {CCI_REG8(0x034f), 0xde}, - {CCI_REG8(0x0301), 0x05}, - {CCI_REG8(0x0303), 0x02}, {CCI_REG8(0x0305), 0x02}, {CCI_REG8(0x0306), 0x00}, {CCI_REG8(0x0307), 0xaf}, {CCI_REG8(0x0309), 0x0a}, - {CCI_REG8(0x030b), 0x02}, - {CCI_REG8(0x030d), 0x02}, - {CCI_REG8(0x0310), 0x01}, - {CCI_REG8(0x0820), 0x07}, - {CCI_REG8(0x0821), 0x08}, - {CCI_REG8(0x0822), 0x00}, - {CCI_REG8(0x0823), 0x00}, - {CCI_REG8(0x080a), 0x00}, - {CCI_REG8(0x080b), 0x7f}, - {CCI_REG8(0x080c), 0x00}, - {CCI_REG8(0x080d), 0x4f}, - {CCI_REG8(0x080e), 0x00}, - {CCI_REG8(0x080f), 0x77}, - {CCI_REG8(0x0810), 0x00}, - {CCI_REG8(0x0811), 0x5f}, - {CCI_REG8(0x0812), 0x00}, - {CCI_REG8(0x0813), 0x57}, - {CCI_REG8(0x0814), 0x00}, - {CCI_REG8(0x0815), 0x4f}, - {CCI_REG8(0x0816), 0x01}, - {CCI_REG8(0x0817), 0x27}, - {CCI_REG8(0x0818), 0x00}, - {CCI_REG8(0x0819), 0x3f}, {CCI_REG8(0xe04c), 0x00}, {CCI_REG8(0xe04d), 0x5f}, {CCI_REG8(0xe04e), 0x00}, {CCI_REG8(0xe04f), 0x1f}, - {CCI_REG8(0x3e20), 0x01}, - {CCI_REG8(0x3e37), 0x00}, - {CCI_REG8(0x3f50), 0x00}, {CCI_REG8(0x3f56), 0x00}, {CCI_REG8(0x3f57), 0xbf}, };