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x86/alternatives: Teach text_poke_bp() to patch Jcc.d32 instructions
commitac0ee0a956upstream. In order to re-write Jcc.d32 instructions text_poke_bp() needs to be taught about them. The biggest hurdle is that the whole machinery is currently made for 5 byte instructions and extending this would grow struct text_poke_loc which is currently a nice 16 bytes and used in an array. However, since text_poke_loc contains a full copy of the (s32) displacement, it is possible to map the Jcc.d32 2 byte opcodes to Jcc.d8 1 byte opcode for the int3 emulation. This then leaves the replacement bytes; fudge that by only storing the last 5 bytes and adding the rule that 'length == 6' instruction will be prefixed with a 0x0f byte. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Link: https://lore.kernel.org/r/20230123210607.115718513@infradead.org [nathan: Introduce is_jcc32() as part of this change; upstream introduced it in3b6c1747da] Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
75c066485b
commit
c51a456b41
@@ -339,6 +339,12 @@ next:
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}
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}
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}
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}
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static inline bool is_jcc32(struct insn *insn)
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{
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/* Jcc.d32 second opcode byte is in the range: 0x80-0x8f */
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return insn->opcode.bytes[0] == 0x0f && (insn->opcode.bytes[1] & 0xf0) == 0x80;
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}
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#if defined(CONFIG_RETPOLINE) && defined(CONFIG_OBJTOOL)
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#if defined(CONFIG_RETPOLINE) && defined(CONFIG_OBJTOOL)
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/*
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/*
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@@ -427,8 +433,7 @@ static int patch_retpoline(void *addr, struct insn *insn, u8 *bytes)
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* [ NOP ]
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* [ NOP ]
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* 1:
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* 1:
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*/
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*/
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/* Jcc.d32 second opcode byte is in the range: 0x80-0x8f */
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if (is_jcc32(insn)) {
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if (op == 0x0f && (insn->opcode.bytes[1] & 0xf0) == 0x80) {
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cc = insn->opcode.bytes[1] & 0xf;
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cc = insn->opcode.bytes[1] & 0xf;
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cc ^= 1; /* invert condition */
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cc ^= 1; /* invert condition */
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@@ -1311,6 +1316,11 @@ void text_poke_sync(void)
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on_each_cpu(do_sync_core, NULL, 1);
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on_each_cpu(do_sync_core, NULL, 1);
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}
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}
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/*
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* NOTE: crazy scheme to allow patching Jcc.d32 but not increase the size of
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* this thing. When len == 6 everything is prefixed with 0x0f and we map
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* opcode to Jcc.d8, using len to distinguish.
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*/
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struct text_poke_loc {
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struct text_poke_loc {
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/* addr := _stext + rel_addr */
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/* addr := _stext + rel_addr */
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s32 rel_addr;
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s32 rel_addr;
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@@ -1432,6 +1442,10 @@ noinstr int poke_int3_handler(struct pt_regs *regs)
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int3_emulate_jmp(regs, (long)ip + tp->disp);
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int3_emulate_jmp(regs, (long)ip + tp->disp);
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break;
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break;
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case 0x70 ... 0x7f: /* Jcc */
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int3_emulate_jcc(regs, tp->opcode & 0xf, (long)ip, tp->disp);
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break;
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default:
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default:
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BUG();
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BUG();
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}
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}
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@@ -1505,16 +1519,26 @@ static void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries
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* Second step: update all but the first byte of the patched range.
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* Second step: update all but the first byte of the patched range.
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*/
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*/
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for (do_sync = 0, i = 0; i < nr_entries; i++) {
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for (do_sync = 0, i = 0; i < nr_entries; i++) {
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u8 old[POKE_MAX_OPCODE_SIZE] = { tp[i].old, };
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u8 old[POKE_MAX_OPCODE_SIZE+1] = { tp[i].old, };
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u8 _new[POKE_MAX_OPCODE_SIZE+1];
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const u8 *new = tp[i].text;
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int len = tp[i].len;
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int len = tp[i].len;
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if (len - INT3_INSN_SIZE > 0) {
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if (len - INT3_INSN_SIZE > 0) {
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memcpy(old + INT3_INSN_SIZE,
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memcpy(old + INT3_INSN_SIZE,
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text_poke_addr(&tp[i]) + INT3_INSN_SIZE,
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text_poke_addr(&tp[i]) + INT3_INSN_SIZE,
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len - INT3_INSN_SIZE);
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len - INT3_INSN_SIZE);
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if (len == 6) {
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_new[0] = 0x0f;
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memcpy(_new + 1, new, 5);
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new = _new;
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}
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text_poke(text_poke_addr(&tp[i]) + INT3_INSN_SIZE,
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text_poke(text_poke_addr(&tp[i]) + INT3_INSN_SIZE,
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(const char *)tp[i].text + INT3_INSN_SIZE,
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new + INT3_INSN_SIZE,
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len - INT3_INSN_SIZE);
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len - INT3_INSN_SIZE);
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do_sync++;
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do_sync++;
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}
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}
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@@ -1542,8 +1566,7 @@ static void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries
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* The old instruction is recorded so that the event can be
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* The old instruction is recorded so that the event can be
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* processed forwards or backwards.
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* processed forwards or backwards.
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*/
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*/
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perf_event_text_poke(text_poke_addr(&tp[i]), old, len,
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perf_event_text_poke(text_poke_addr(&tp[i]), old, len, new, len);
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tp[i].text, len);
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}
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}
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if (do_sync) {
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if (do_sync) {
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@@ -1560,10 +1583,15 @@ static void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries
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* replacing opcode.
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* replacing opcode.
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*/
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*/
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for (do_sync = 0, i = 0; i < nr_entries; i++) {
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for (do_sync = 0, i = 0; i < nr_entries; i++) {
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if (tp[i].text[0] == INT3_INSN_OPCODE)
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u8 byte = tp[i].text[0];
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if (tp[i].len == 6)
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byte = 0x0f;
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if (byte == INT3_INSN_OPCODE)
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continue;
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continue;
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text_poke(text_poke_addr(&tp[i]), tp[i].text, INT3_INSN_SIZE);
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text_poke(text_poke_addr(&tp[i]), &byte, INT3_INSN_SIZE);
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do_sync++;
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do_sync++;
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}
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}
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@@ -1581,9 +1609,11 @@ static void text_poke_loc_init(struct text_poke_loc *tp, void *addr,
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const void *opcode, size_t len, const void *emulate)
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const void *opcode, size_t len, const void *emulate)
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{
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{
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struct insn insn;
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struct insn insn;
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int ret, i;
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int ret, i = 0;
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memcpy((void *)tp->text, opcode, len);
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if (len == 6)
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i = 1;
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memcpy((void *)tp->text, opcode+i, len-i);
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if (!emulate)
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if (!emulate)
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emulate = opcode;
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emulate = opcode;
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@@ -1594,6 +1624,13 @@ static void text_poke_loc_init(struct text_poke_loc *tp, void *addr,
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tp->len = len;
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tp->len = len;
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tp->opcode = insn.opcode.bytes[0];
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tp->opcode = insn.opcode.bytes[0];
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if (is_jcc32(&insn)) {
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/*
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* Map Jcc.d32 onto Jcc.d8 and use len to distinguish.
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*/
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tp->opcode = insn.opcode.bytes[1] - 0x10;
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}
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switch (tp->opcode) {
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switch (tp->opcode) {
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case RET_INSN_OPCODE:
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case RET_INSN_OPCODE:
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case JMP32_INSN_OPCODE:
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case JMP32_INSN_OPCODE:
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@@ -1610,7 +1647,6 @@ static void text_poke_loc_init(struct text_poke_loc *tp, void *addr,
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BUG_ON(len != insn.length);
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BUG_ON(len != insn.length);
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};
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};
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switch (tp->opcode) {
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switch (tp->opcode) {
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case INT3_INSN_OPCODE:
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case INT3_INSN_OPCODE:
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case RET_INSN_OPCODE:
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case RET_INSN_OPCODE:
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@@ -1619,6 +1655,7 @@ static void text_poke_loc_init(struct text_poke_loc *tp, void *addr,
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case CALL_INSN_OPCODE:
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case CALL_INSN_OPCODE:
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case JMP32_INSN_OPCODE:
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case JMP32_INSN_OPCODE:
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case JMP8_INSN_OPCODE:
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case JMP8_INSN_OPCODE:
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case 0x70 ... 0x7f: /* Jcc */
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tp->disp = insn.immediate.value;
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tp->disp = insn.immediate.value;
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break;
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break;
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