thermal/drivers/mediatek/lvts_thermal: Change lvts commands array to static const

Change the LVTS commands array to static const in preparation for
adding different commands.

Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
Link: https://lore.kernel.org/r/20250526102659.30225-2-mason-cw.chang@mediatek.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Mason Chang
2025-05-26 18:26:57 +08:00
committed by Daniel Lezcano
parent ae332ec000
commit c5d5a72c01

View File

@@ -96,6 +96,17 @@
#define LVTS_MINIMUM_THRESHOLD 20000 #define LVTS_MINIMUM_THRESHOLD 20000
static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
/*
* Write device mask: 0xC1030000
*/
static const u32 default_init_cmds[] = {
0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
};
static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT; static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
static int golden_temp_offset; static int golden_temp_offset;
@@ -902,7 +913,7 @@ static void lvts_ctrl_monitor_enable(struct device *dev, struct lvts_ctrl *lvts_
* each write in the configuration register must be separated by a * each write in the configuration register must be separated by a
* delay of 2 us. * delay of 2 us.
*/ */
static void lvts_write_config(struct lvts_ctrl *lvts_ctrl, u32 *cmds, int nr_cmds) static void lvts_write_config(struct lvts_ctrl *lvts_ctrl, const u32 *cmds, int nr_cmds)
{ {
int i; int i;
@@ -985,9 +996,9 @@ static int lvts_ctrl_set_enable(struct lvts_ctrl *lvts_ctrl, int enable)
static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl) static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
{ {
u32 id, cmds[] = { 0xC103FFFF, 0xC502FF55 }; u32 id;
lvts_write_config(lvts_ctrl, cmds, ARRAY_SIZE(cmds)); lvts_write_config(lvts_ctrl, default_conn_cmds, ARRAY_SIZE(default_conn_cmds));
/* /*
* LVTS_ID : Get ID and status of the thermal controller * LVTS_ID : Get ID and status of the thermal controller
@@ -1006,17 +1017,7 @@ static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
static int lvts_ctrl_initialize(struct device *dev, struct lvts_ctrl *lvts_ctrl) static int lvts_ctrl_initialize(struct device *dev, struct lvts_ctrl *lvts_ctrl)
{ {
/* lvts_write_config(lvts_ctrl, default_init_cmds, ARRAY_SIZE(default_init_cmds));
* Write device mask: 0xC1030000
*/
u32 cmds[] = {
0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
};
lvts_write_config(lvts_ctrl, cmds, ARRAY_SIZE(cmds));
return 0; return 0;
} }