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dpll: zl3073x: Refactor DPLL initialization
[ Upstream commitebb1031c51] Refactor DPLL initialization and move DPLL (de)registration, monitoring control, fetching device invariant parameters and phase offset measurement block setup to separate functions. Use these new functions during device probe and teardown functions and during changes to the clock_id devlink parameter. These functions will also be used in the next patch implementing devlink flash, where this functionality is likewise required. Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20250909091532.11790-5-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> Stable-dep-of:fcb8b32a68("dpll: zl3073x: Handle missing or corrupted flash configuration") Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Ivan Vecera
committed by
Greg Kroah-Hartman
Greg Kroah-Hartman
parent
a20a6efd64
commit
c9ce287150
@@ -809,93 +809,9 @@ zl3073x_dev_periodic_work(struct kthread_work *work)
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msecs_to_jiffies(500));
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}
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static void zl3073x_dev_dpll_fini(void *ptr)
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{
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struct zl3073x_dpll *zldpll, *next;
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struct zl3073x_dev *zldev = ptr;
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/* Stop monitoring thread */
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if (zldev->kworker) {
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kthread_cancel_delayed_work_sync(&zldev->work);
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kthread_destroy_worker(zldev->kworker);
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zldev->kworker = NULL;
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}
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/* Release DPLLs */
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list_for_each_entry_safe(zldpll, next, &zldev->dplls, list) {
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zl3073x_dpll_unregister(zldpll);
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list_del(&zldpll->list);
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zl3073x_dpll_free(zldpll);
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}
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}
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static int
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zl3073x_devm_dpll_init(struct zl3073x_dev *zldev, u8 num_dplls)
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{
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struct kthread_worker *kworker;
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struct zl3073x_dpll *zldpll;
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unsigned int i;
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int rc;
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INIT_LIST_HEAD(&zldev->dplls);
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/* Initialize all DPLLs */
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for (i = 0; i < num_dplls; i++) {
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zldpll = zl3073x_dpll_alloc(zldev, i);
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if (IS_ERR(zldpll)) {
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dev_err_probe(zldev->dev, PTR_ERR(zldpll),
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"Failed to alloc DPLL%u\n", i);
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rc = PTR_ERR(zldpll);
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goto error;
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}
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rc = zl3073x_dpll_register(zldpll);
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if (rc) {
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dev_err_probe(zldev->dev, rc,
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"Failed to register DPLL%u\n", i);
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zl3073x_dpll_free(zldpll);
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goto error;
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}
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list_add_tail(&zldpll->list, &zldev->dplls);
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}
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/* Perform initial firmware fine phase correction */
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rc = zl3073x_dpll_init_fine_phase_adjust(zldev);
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if (rc) {
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dev_err_probe(zldev->dev, rc,
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"Failed to init fine phase correction\n");
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goto error;
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}
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/* Initialize monitoring thread */
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kthread_init_delayed_work(&zldev->work, zl3073x_dev_periodic_work);
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kworker = kthread_run_worker(0, "zl3073x-%s", dev_name(zldev->dev));
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if (IS_ERR(kworker)) {
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rc = PTR_ERR(kworker);
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goto error;
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}
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zldev->kworker = kworker;
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kthread_queue_delayed_work(zldev->kworker, &zldev->work, 0);
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/* Add devres action to release DPLL related resources */
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rc = devm_add_action_or_reset(zldev->dev, zl3073x_dev_dpll_fini, zldev);
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if (rc)
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goto error;
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return 0;
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error:
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zl3073x_dev_dpll_fini(zldev);
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return rc;
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}
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/**
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* zl3073x_dev_phase_meas_setup - setup phase offset measurement
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* @zldev: pointer to zl3073x_dev structure
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* @num_channels: number of DPLL channels
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*
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* Enable phase offset measurement block, set measurement averaging factor
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* and enable DPLL-to-its-ref phase measurement for all DPLLs.
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@@ -903,10 +819,11 @@ error:
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* Returns: 0 on success, <0 on error
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*/
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static int
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zl3073x_dev_phase_meas_setup(struct zl3073x_dev *zldev, int num_channels)
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zl3073x_dev_phase_meas_setup(struct zl3073x_dev *zldev)
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{
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u8 dpll_meas_ctrl, mask;
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int i, rc;
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struct zl3073x_dpll *zldpll;
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u8 dpll_meas_ctrl, mask = 0;
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int rc;
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/* Read DPLL phase measurement control register */
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rc = zl3073x_read_u8(zldev, ZL_REG_DPLL_MEAS_CTRL, &dpll_meas_ctrl);
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@@ -926,12 +843,165 @@ zl3073x_dev_phase_meas_setup(struct zl3073x_dev *zldev, int num_channels)
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return rc;
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/* Enable DPLL-to-connected-ref measurement for each channel */
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for (i = 0, mask = 0; i < num_channels; i++)
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mask |= BIT(i);
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list_for_each_entry(zldpll, &zldev->dplls, list)
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mask |= BIT(zldpll->id);
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return zl3073x_write_u8(zldev, ZL_REG_DPLL_PHASE_ERR_READ_MASK, mask);
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}
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/**
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* zl3073x_dev_start - Start normal operation
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* @zldev: zl3073x device pointer
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* @full: perform full initialization
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*
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* The function starts normal operation, which means registering all DPLLs and
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* their pins, and starting monitoring. If full initialization is requested,
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* the function additionally initializes the phase offset measurement block and
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* fetches hardware-invariant parameters.
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*
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* Return: 0 on success, <0 on error
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*/
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int zl3073x_dev_start(struct zl3073x_dev *zldev, bool full)
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{
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struct zl3073x_dpll *zldpll;
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int rc;
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if (full) {
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/* Fetch device state */
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rc = zl3073x_dev_state_fetch(zldev);
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if (rc)
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return rc;
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/* Setup phase offset measurement block */
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rc = zl3073x_dev_phase_meas_setup(zldev);
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if (rc) {
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dev_err(zldev->dev,
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"Failed to setup phase measurement\n");
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return rc;
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}
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}
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/* Register all DPLLs */
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list_for_each_entry(zldpll, &zldev->dplls, list) {
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rc = zl3073x_dpll_register(zldpll);
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if (rc) {
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dev_err_probe(zldev->dev, rc,
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"Failed to register DPLL%u\n",
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zldpll->id);
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return rc;
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}
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}
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/* Perform initial firmware fine phase correction */
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rc = zl3073x_dpll_init_fine_phase_adjust(zldev);
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if (rc) {
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dev_err_probe(zldev->dev, rc,
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"Failed to init fine phase correction\n");
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return rc;
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}
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/* Start monitoring */
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kthread_queue_delayed_work(zldev->kworker, &zldev->work, 0);
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return 0;
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}
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/**
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* zl3073x_dev_stop - Stop normal operation
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* @zldev: zl3073x device pointer
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*
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* The function stops the normal operation that mean deregistration of all
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* DPLLs and their pins and stop monitoring.
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*
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* Return: 0 on success, <0 on error
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*/
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void zl3073x_dev_stop(struct zl3073x_dev *zldev)
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{
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struct zl3073x_dpll *zldpll;
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/* Stop monitoring */
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kthread_cancel_delayed_work_sync(&zldev->work);
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/* Unregister all DPLLs */
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list_for_each_entry(zldpll, &zldev->dplls, list) {
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if (zldpll->dpll_dev)
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zl3073x_dpll_unregister(zldpll);
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}
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}
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static void zl3073x_dev_dpll_fini(void *ptr)
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{
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struct zl3073x_dpll *zldpll, *next;
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struct zl3073x_dev *zldev = ptr;
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/* Stop monitoring and unregister DPLLs */
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zl3073x_dev_stop(zldev);
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/* Destroy monitoring thread */
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if (zldev->kworker) {
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kthread_destroy_worker(zldev->kworker);
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zldev->kworker = NULL;
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}
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/* Free all DPLLs */
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list_for_each_entry_safe(zldpll, next, &zldev->dplls, list) {
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list_del(&zldpll->list);
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zl3073x_dpll_free(zldpll);
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}
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}
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static int
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zl3073x_devm_dpll_init(struct zl3073x_dev *zldev, u8 num_dplls)
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{
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struct kthread_worker *kworker;
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struct zl3073x_dpll *zldpll;
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unsigned int i;
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int rc;
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INIT_LIST_HEAD(&zldev->dplls);
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/* Allocate all DPLLs */
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for (i = 0; i < num_dplls; i++) {
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zldpll = zl3073x_dpll_alloc(zldev, i);
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if (IS_ERR(zldpll)) {
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dev_err_probe(zldev->dev, PTR_ERR(zldpll),
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"Failed to alloc DPLL%u\n", i);
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rc = PTR_ERR(zldpll);
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goto error;
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}
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list_add_tail(&zldpll->list, &zldev->dplls);
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}
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/* Initialize monitoring thread */
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kthread_init_delayed_work(&zldev->work, zl3073x_dev_periodic_work);
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kworker = kthread_run_worker(0, "zl3073x-%s", dev_name(zldev->dev));
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if (IS_ERR(kworker)) {
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rc = PTR_ERR(kworker);
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goto error;
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}
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zldev->kworker = kworker;
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/* Start normal operation */
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rc = zl3073x_dev_start(zldev, true);
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if (rc) {
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dev_err_probe(zldev->dev, rc, "Failed to start device\n");
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goto error;
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}
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/* Add devres action to release DPLL related resources */
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rc = devm_add_action_or_reset(zldev->dev, zl3073x_dev_dpll_fini, zldev);
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if (rc)
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goto error;
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return 0;
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error:
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zl3073x_dev_dpll_fini(zldev);
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return rc;
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}
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/**
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* zl3073x_dev_probe - initialize zl3073x device
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* @zldev: pointer to zl3073x device
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@@ -999,17 +1069,6 @@ int zl3073x_dev_probe(struct zl3073x_dev *zldev,
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return dev_err_probe(zldev->dev, rc,
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"Failed to initialize mutex\n");
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/* Fetch device state */
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rc = zl3073x_dev_state_fetch(zldev);
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if (rc)
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return rc;
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/* Setup phase offset measurement block */
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rc = zl3073x_dev_phase_meas_setup(zldev, chip_info->num_channels);
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if (rc)
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return dev_err_probe(zldev->dev, rc,
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"Failed to setup phase measurement\n");
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/* Register DPLL channels */
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rc = zl3073x_devm_dpll_init(zldev, chip_info->num_channels);
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if (rc)
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@@ -111,6 +111,9 @@ struct zl3073x_dev *zl3073x_devm_alloc(struct device *dev);
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int zl3073x_dev_probe(struct zl3073x_dev *zldev,
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const struct zl3073x_chip_info *chip_info);
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int zl3073x_dev_start(struct zl3073x_dev *zldev, bool full);
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void zl3073x_dev_stop(struct zl3073x_dev *zldev);
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/**********************
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* Registers operations
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**********************/
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@@ -86,14 +86,12 @@ zl3073x_devlink_reload_down(struct devlink *devlink, bool netns_change,
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struct netlink_ext_ack *extack)
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{
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struct zl3073x_dev *zldev = devlink_priv(devlink);
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struct zl3073x_dpll *zldpll;
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if (action != DEVLINK_RELOAD_ACTION_DRIVER_REINIT)
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return -EOPNOTSUPP;
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/* Unregister all DPLLs */
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list_for_each_entry(zldpll, &zldev->dplls, list)
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zl3073x_dpll_unregister(zldpll);
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/* Stop normal operation */
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zl3073x_dev_stop(zldev);
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return 0;
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}
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@@ -107,7 +105,6 @@ zl3073x_devlink_reload_up(struct devlink *devlink,
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{
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struct zl3073x_dev *zldev = devlink_priv(devlink);
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union devlink_param_value val;
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struct zl3073x_dpll *zldpll;
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int rc;
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if (action != DEVLINK_RELOAD_ACTION_DRIVER_REINIT)
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@@ -125,13 +122,10 @@ zl3073x_devlink_reload_up(struct devlink *devlink,
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zldev->clock_id = val.vu64;
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}
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/* Re-register all DPLLs */
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list_for_each_entry(zldpll, &zldev->dplls, list) {
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rc = zl3073x_dpll_register(zldpll);
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/* Restart normal operation */
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rc = zl3073x_dev_start(zldev, false);
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if (rc)
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dev_warn(zldev->dev,
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"Failed to re-register DPLL%u\n", zldpll->id);
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}
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dev_warn(zldev->dev, "Failed to re-start normal operation\n");
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*actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT);
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