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cpufreq: intel_pstate: Fix processing for turbo activation ratio
commit1becf03545upstream. When the config TDP level is not nominal (level = 0), the MSR values for reading level 1 and level 2 ratios contain power in low 14 bits and actual ratio bits are at bits [23:16]. The current processing for level 1 and level 2 is wrong as there is no shift done to get actual ratio. Fixes:6a35fc2d6c(cpufreq: intel_pstate: get P1 from TAR when available) Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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popcornmix
parent
c4ee8c3730
commit
cc77c99409
@@ -667,6 +667,11 @@ static int core_get_max_pstate(void)
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if (err)
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if (err)
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goto skip_tar;
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goto skip_tar;
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/* For level 1 and 2, bits[23:16] contain the ratio */
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if (tdp_ctrl)
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tdp_ratio >>= 16;
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tdp_ratio &= 0xff; /* ratios are only 8 bits long */
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if (tdp_ratio - 1 == tar) {
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if (tdp_ratio - 1 == tar) {
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max_pstate = tar;
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max_pstate = tar;
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pr_debug("max_pstate=TAC %x\n", max_pstate);
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pr_debug("max_pstate=TAC %x\n", max_pstate);
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