arm64: dts: imx8q: add PCIe EP for i.MX8QM and i.MX8QXP

Add PCIe EP support for i.MX8QM and i.MX8QXP.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Frank Li
2025-01-28 16:15:56 -05:00
committed by Shawn Guo
parent b09435bc5e
commit d03743c565
2 changed files with 38 additions and 0 deletions

View File

@@ -80,6 +80,25 @@ hsio_subsys: bus@5f000000 {
status = "disabled";
};
pcieb_ep: pcie-ep@5f010000 {
compatible = "fsl,imx8q-pcie-ep";
reg = <0x5f010000 0x00010000>,
<0x80000000 0x10000000>;
reg-names = "dbi", "addr_space";
num-lanes = <1>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dma";
clocks = <&pcieb_lpcg IMX_LPCG_CLK_6>,
<&pcieb_lpcg IMX_LPCG_CLK_4>,
<&pcieb_lpcg IMX_LPCG_CLK_5>;
clock-names = "dbi", "mstr", "slv";
power-domains = <&pd IMX_SC_R_PCIE_B>;
fsl,max-link-speed = <3>;
num-ib-windows = <6>;
num-ob-windows = <6>;
status = "disabled";
};
pcieb_lpcg: clock-controller@5f060000 {
compatible = "fsl,imx8qxp-lpcg";
reg = <0x5f060000 0x10000>;

View File

@@ -42,6 +42,25 @@
status = "disabled";
};
pciea_ep: pcie-ep@5f000000 {
compatible = "fsl,imx8q-pcie-ep";
reg = <0x5f000000 0x00010000>,
<0x40000000 0x10000000>;
reg-names = "dbi", "addr_space";
num-lanes = <1>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dma";
clocks = <&pciea_lpcg IMX_LPCG_CLK_6>,
<&pciea_lpcg IMX_LPCG_CLK_4>,
<&pciea_lpcg IMX_LPCG_CLK_5>;
clock-names = "dbi", "mstr", "slv";
power-domains = <&pd IMX_SC_R_PCIE_A>;
fsl,max-link-speed = <3>;
num-ib-windows = <6>;
num-ob-windows = <6>;
status = "disabled";
};
pcieb: pcie@5f010000 {
compatible = "fsl,imx8q-pcie";
reg = <0x5f010000 0x10000>,