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perf sample: Make user_regs and intr_regs optional

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The struct dump_regs contains 512 bytes of cache_regs, meaning the two
values in perf_sample contribute 1088 bytes of its total 1384 bytes
size. Initializing this much memory has a cost reported by Tavian
Barnes <tavianator@tavianator.com> as about 2.5% when running `perf
script --itrace=i0`:
https://lore.kernel.org/lkml/d841b97b3ad2ca8bcab07e4293375fb7c32dfce7.1736618095.git.tavianator@tavianator.com/

Adrian Hunter <adrian.hunter@intel.com> replied that the zero
initialization was necessary and couldn't simply be removed.

This patch aims to strike a middle ground of still zeroing the
perf_sample, but removing 79% of its size by make user_regs and
intr_regs optional pointers to zalloc-ed memory. To support the
allocation accessors are created for user_regs and intr_regs. To
support correct cleanup perf_sample__init and perf_sample__exit
functions are created and added throughout the code base.

Signed-off-by: Ian Rogers <irogers@google.com>
Link: https://lore.kernel.org/r/20250113194345.1537821-1-irogers@google.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
This commit is contained in:
Ian Rogers
2025-01-13 11:43:45 -08:00
committed by Namhyung Kim
parent 08d9e88348
commit dc6d2bc2d8
34 changed files with 448 additions and 191 deletions
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24
tools/perf/util/arm-spe.c
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@@ -379,8 +379,10 @@ static int arm_spe__synth_mem_sample(struct arm_spe_queue *speq,
struct arm_spe *spe = speq->spe;
struct arm_spe_record *record = &speq->decoder->record;
union perf_event *event = speq->event_buf;
struct perf_sample sample = { .ip = 0, };
struct perf_sample sample;
int ret;
perf_sample__init(&sample, /*all=*/true);
arm_spe_prep_sample(spe, speq, event, &sample);
sample.id = spe_events_id;
@@ -390,7 +392,9 @@ static int arm_spe__synth_mem_sample(struct arm_spe_queue *speq,
sample.data_src = data_src;
sample.weight = record->latency;
return arm_spe_deliver_synth_event(spe, speq, event, &sample);
ret = arm_spe_deliver_synth_event(spe, speq, event, &sample);
perf_sample__exit(&sample);
return ret;
}
static int arm_spe__synth_branch_sample(struct arm_spe_queue *speq,
@@ -399,8 +403,10 @@ static int arm_spe__synth_branch_sample(struct arm_spe_queue *speq,
struct arm_spe *spe = speq->spe;
struct arm_spe_record *record = &speq->decoder->record;
union perf_event *event = speq->event_buf;
struct perf_sample sample = { .ip = 0, };
struct perf_sample sample;
int ret;
perf_sample__init(&sample, /*all=*/true);
arm_spe_prep_sample(spe, speq, event, &sample);
sample.id = spe_events_id;
@@ -409,7 +415,9 @@ static int arm_spe__synth_branch_sample(struct arm_spe_queue *speq,
sample.weight = record->latency;
sample.flags = speq->flags;
return arm_spe_deliver_synth_event(spe, speq, event, &sample);
ret = arm_spe_deliver_synth_event(spe, speq, event, &sample);
perf_sample__exit(&sample);
return ret;
}
static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,
@@ -418,7 +426,8 @@ static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,
struct arm_spe *spe = speq->spe;
struct arm_spe_record *record = &speq->decoder->record;
union perf_event *event = speq->event_buf;
struct perf_sample sample = { .ip = 0, };
struct perf_sample sample;
int ret;
/*
* Handles perf instruction sampling period.
@@ -428,6 +437,7 @@ static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,
return 0;
speq->period_instructions = 0;
perf_sample__init(&sample, /*all=*/true);
arm_spe_prep_sample(spe, speq, event, &sample);
sample.id = spe_events_id;
@@ -439,7 +449,9 @@ static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,
sample.weight = record->latency;
sample.flags = speq->flags;
return arm_spe_deliver_synth_event(spe, speq, event, &sample);
ret = arm_spe_deliver_synth_event(spe, speq, event, &sample);
perf_sample__exit(&sample);
return ret;
}
static const struct midr_range common_ds_encoding_cpus[] = {