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ACPI: HMAT: Introduce 2 levels of generic port access class

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[ Upstream commit 1745a7b364 ]

In order to compute access0 and access1 classes for CXL memory, 2 levels
of generic port information must be stored. Access0 will indicate the
generic port access coordinates to the closest initiator and access1
will indicate the generic port access coordinates to the cloest CPU.

Cc: Rafael J. Wysocki <rafael@kernel.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20240308220055.2172956-4-dave.jiang@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Stable-dep-of: 592780b839 ("cxl: Fix retrieving of access_coordinates in PCIe path")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Dave Jiang
2024-03-08 14:59:22 -07:00
committed by Greg Kroah-Hartman
parent 13c92c2e9e
commit ddf9cd405f
1 changed files with 10 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/acpi/numa/hmat.c
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@@ -59,7 +59,8 @@ struct target_cache {
};
enum {
NODE_ACCESS_CLASS_GENPORT_SINK = ACCESS_COORDINATE_MAX,
NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL = ACCESS_COORDINATE_MAX,
NODE_ACCESS_CLASS_GENPORT_SINK_CPU,
NODE_ACCESS_CLASS_MAX,
};
@@ -141,7 +142,7 @@ int acpi_get_genport_coordinates(u32 uid,
if (!target)
return -ENOENT;
*coord = target->coord[NODE_ACCESS_CLASS_GENPORT_SINK];
*coord = target->coord[NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL];
return 0;
}
@@ -695,7 +696,8 @@ static void hmat_update_target_attrs(struct memory_target *target,
int i;
/* Don't update for generic port if there's no device handle */
if (access == NODE_ACCESS_CLASS_GENPORT_SINK &&
if ((access == NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL ||
access == NODE_ACCESS_CLASS_GENPORT_SINK_CPU) &&
!(*(u16 *)target->gen_port_device_handle))
return;
@@ -736,7 +738,8 @@ static void hmat_update_target_attrs(struct memory_target *target,
list_for_each_entry(initiator, &initiators, node) {
u32 value;
if (access == ACCESS_COORDINATE_CPU &&
if ((access == ACCESS_COORDINATE_CPU ||
access == NODE_ACCESS_CLASS_GENPORT_SINK_CPU) &&
!initiator->has_cpu) {
clear_bit(initiator->processor_pxm, p_nodes);
continue;
@@ -775,7 +778,9 @@ static void hmat_update_generic_target(struct memory_target *target)
static DECLARE_BITMAP(p_nodes, MAX_NUMNODES);
hmat_update_target_attrs(target, p_nodes,
NODE_ACCESS_CLASS_GENPORT_SINK);
NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL);
hmat_update_target_attrs(target, p_nodes,
NODE_ACCESS_CLASS_GENPORT_SINK_CPU);
}
static void hmat_register_target_initiators(struct memory_target *target)