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clk-bcm2835: Use PLLD for DSI0 HS clock
DSI0 can take the clock from either PLLA or PLLD. PLLA is the default muxing, but PLLD is considered the more stable. Switch to using PLLD. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
This commit is contained in:
committed by
Dom Cobley
parent
f9f70d75be
commit
de24342cef
@@ -107,6 +107,7 @@
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#define CM_UARTDIV 0x0f4
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#define CM_UARTDIV 0x0f4
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#define CM_VECCTL 0x0f8
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#define CM_VECCTL 0x0f8
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#define CM_VECDIV 0x0fc
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#define CM_VECDIV 0x0fc
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#define CM_DSI0HSCK 0x120
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#define CM_PULSECTL 0x190
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#define CM_PULSECTL 0x190
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#define CM_PULSEDIV 0x194
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#define CM_PULSEDIV 0x194
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#define CM_SDCCTL 0x1a8
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#define CM_SDCCTL 0x1a8
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@@ -2357,6 +2358,9 @@ static int bcm2835_clk_probe(struct platform_device *pdev)
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if (IS_ERR(cprman->regs))
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if (IS_ERR(cprman->regs))
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return PTR_ERR(cprman->regs);
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return PTR_ERR(cprman->regs);
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/* Mux DSI0 clock to PLLD */
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cprman_write(cprman, CM_DSI0HSCK, 1);
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fw_node = of_parse_phandle(dev->of_node, "firmware", 0);
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fw_node = of_parse_phandle(dev->of_node, "firmware", 0);
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if (fw_node) {
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if (fw_node) {
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struct rpi_firmware *fw = rpi_firmware_get(fw_node);
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struct rpi_firmware *fw = rpi_firmware_get(fw_node);
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