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drm/vc4: Add vblank callback to DSI0 to reset FIFO

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The pixel to byte FIFO appears to not always reset correctly,
which can lead to colour errors and/or horizontal shifts.
Reset on every vblank to work around the issue.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
This commit is contained in:
Dave Stevenson
2024-04-05 17:40:05 +01:00
committed by Dom Cobley
parent 353a58ef6e
commit df24a7357f
1 changed files with 12 additions and 0 deletions
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12
drivers/gpu/drm/vc4/vc4_dsi.c
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@@ -1460,6 +1460,15 @@ static const struct drm_bridge_funcs vc4_dsi_bridge_funcs = {
.mode_fixup = vc4_dsi_bridge_mode_fixup,
};
static void vc4_dsi_reset_fifo(struct drm_encoder *encoder)
{
struct vc4_dsi *dsi = to_vc4_dsi(encoder);
u32 val;
val = DSI_PORT_READ(CTRL);
DSI_PORT_WRITE(CTRL, val | DSI0_CTRL_CLR_PBCF);
}
static int vc4_dsi_late_register(struct drm_encoder *encoder)
{
struct drm_device *drm = encoder->dev;
@@ -1690,6 +1699,9 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data)
dsi->encoder.type = dsi->variant->port ?
VC4_ENCODER_TYPE_DSI1 : VC4_ENCODER_TYPE_DSI0;
if (dsi->encoder.type == VC4_ENCODER_TYPE_DSI0)
dsi->encoder.vblank = vc4_dsi_reset_fifo;
dsi->regs = vc4_ioremap_regs(pdev, 0);
if (IS_ERR(dsi->regs))
return PTR_ERR(dsi->regs);