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dt-bindings: clk: rp1: Add clocks representing MIPI DSI byteclock
Define two new RP1 clocks, representing the MIPI DSI byteclock sources for the dividers used to generate MIPI[01] DPI pixel clocks. (Previously they were represented by "fake" fixed clocks sources). Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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@@ -54,3 +54,7 @@
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/* Extra PLL output channels - RP1B0 only */
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#define RP1_PLL_VIDEO_PRI_PH 43
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#define RP1_PLL_AUDIO_TERN 44
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/* MIPI clocks managed by the DSI driver */
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#define RP1_CLK_MIPI0_DSI_BYTECLOCK 45
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#define RP1_CLK_MIPI1_DSI_BYTECLOCK 46
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