dt-bindings: clk: rp1: Add clocks representing MIPI DSI byteclock

Define two new RP1 clocks, representing the MIPI DSI byteclock
sources for the dividers used to generate MIPI[01] DPI pixel clocks.
(Previously they were represented by "fake" fixed clocks sources).

Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
This commit is contained in:
Nick Hollinghurst
2024-05-10 15:18:44 +01:00
parent e0c78d5908
commit e364ff2aa4

View File

@@ -54,3 +54,7 @@
/* Extra PLL output channels - RP1B0 only */
#define RP1_PLL_VIDEO_PRI_PH 43
#define RP1_PLL_AUDIO_TERN 44
/* MIPI clocks managed by the DSI driver */
#define RP1_CLK_MIPI0_DSI_BYTECLOCK 45
#define RP1_CLK_MIPI1_DSI_BYTECLOCK 46