raspi/linux
1
0
Fork 1
mirror of https://github.com/raspberrypi/linux.git synced 2025-12-24 19:12:14 +00:00
Code Issues Projects Releases Wiki Activity
1,311,309 Commits 105 Branches 108 Tags
17f7c9bc06a917d90fb8fcecb15f4fa383384685
Commit Graph

31 Commits

Author SHA1 Message Date
Uwe Kleine-König
d99913e1b8 riscv: dts: Replace deprecated snps,nr-gpios property for snps,dw-apb-gpio-port devices 
snps,dw-apb-gpio-port is deprecated since commit ef42a8da3c
("dt-bindings: gpio: dwapb: Add ngpios property support"). The
respective driver supports this since commit 7569486d79 ("gpio: dwapb:
Add ngpios DT-property support") which is included in Linux v5.10-rc1.

This change was created using

	git grep -l snps,nr-gpios arch/riscv/boot/dts | xargs perl -p -i -e 's/\bsnps,nr-gpios\b/ngpios/

.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Fixes: a508d794f8 ("riscv: sophgo: dts: add gpio controllers for SG2042 SoC")
Link: https://lore.kernel.org/r/20241022091428.477697-8-u.kleine-koenig@baylibre.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-10-25 19:32:16 +08:00
Inochi Amaoto
585dcb21cc riscv: dts: sophgo: Add mcu device for Milk-V Pioneer 
Add mcu device and thermal zones node for Milk-V Pioneer.

Tested-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB4953C675C28B35723E87A36BBB822@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-09-02 08:35:13 +08:00
Chen Wang
a508d794f8 riscv: sophgo: dts: add gpio controllers for SG2042 SoC 
Add support for the GPIO controller of Sophgo SG2042.

SG2042 uses IP from Synopsys DesignWare APB GPIO and has
three GPIO controllers.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/20240819080851.1954691-1-unicornxw@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
 2024-09-02 08:35:13 +08:00
Chen Wang
014b839f79 riscv: sophgo: dts: add mmc controllers for SG2042 SoC 
SG2042 has two MMC controller, one for emmc, another for sd-card.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/03ac9ec9c23bbe4c3b30271e76537bdbe5638665.1722847198.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
 2024-09-02 08:35:12 +08:00
Inochi Amaoto
c8eb04aecd riscv: dts: sophgo: Add i2c device support for sg2042 
The i2c ip of sg2042 is a standard Synopsys i2c ip, which is already
supported by the mainline kernel.

Add i2c device node for sg2042.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Tested-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49530E59974AF0FCA4FAB6DBBBB72@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-09-02 08:35:12 +08:00
Inochi Amaoto
5d9e6bc82b riscv: dts: sophgo: Use common "interrupt-parent" for all peripherals for sg2042 
As all peripherals of sg2042 share the same "interrupt-parent",
there is no need to use peripherals specific "interrupt-parent".
Define "interrupt-parent" in the SoC level.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Tested-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49531F6DFD2F116207C1397DBBB72@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-09-02 08:35:12 +08:00
Inochi Amaoto
63c33528b7 riscv: dts: sophgo: Add sdhci0 configuration for Huashan Pi 
Add configuration for sdhci0 for Huashan Pi to support sd card.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49538AC83C5DB314D10F7186BBA92@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-09-02 08:32:11 +08:00
Inochi Amaoto
514951a81a riscv: dts: sophgo: cv18xx: add DMA controller 
Add DMA controller dt node for CV18XX/SG200x.

Link: https://lore.kernel.org/r/IA1PR20MB4953BD73E12B8A1CDBD9E1A3BB042@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-09-02 08:32:11 +08:00
Arnd Bergmann
95ab7b209b Merge tag 'riscv-sophgo-dt-for-v6.11' of https://github.com/sophgo/linux into soc/dt 
RISC-V Devicetrees for v6.11

Sopgho:
Add clock support for SG2042.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* tag 'riscv-sophgo-dt-for-v6.11' of https://github.com/sophgo/linux:
  riscv: dts: add clock generator for Sophgo SG2042 SoC

Link: https://lore.kernel.org/r/PN1P287MB281861EA2B1706B430D2FA3EFEDB2@PN1P287MB2818.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2024-07-09 10:50:42 +02:00
Chen Wang
b1240a3951 riscv: dts: add clock generator for Sophgo SG2042 SoC 
Add clock generator node to device tree for SG2042, and enable clock for
uart.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
 2024-07-09 08:19:52 +08:00
Haylen Chu
890182bb3d riscv: dts: sophgo: disable write-protection for milkv duo 
Milkv Duo does not have a write-protect pin, so disable write protect
to prevent SDcards misdetected as read-only.

Fixes: 89a7056ed4 ("riscv: dts: sophgo: add sdcard support for milkv duo")
Signed-off-by: Haylen Chu <heylenay@outlook.com>
Link: https://lore.kernel.org/r/SEYPR01MB4221943C7B101DD2318DA0D3D7CE2@SEYPR01MB4221.apcprd01.prod.exchangelabs.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-06-19 08:46:03 +08:00
Inochi Amaoto
1eba0b61be riscv: dts: sophgo: add reserved memory node for CV1800B 
The original dts of CV1800B has a weird memory length as it
contains reserved memory for coprocessor. Make this area a
separate node so it can get the real memory length.

Link: https://lore.kernel.org/r/IA1PR20MB49531F274753B04A5547DB59BB052@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-04-23 16:38:09 +08:00
Inochi Amaoto
886776ca23 riscv: dts: sophgo: use real clock for sdhci 
As the clk patch is merged, Use real clocks for sdhci0.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB4953CA5D46EA8913B130D502BB052@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-04-22 08:31:05 +08:00
Inochi Amaoto
65fcc08b4c riscv: dts: sophgo: cv18xx: Add i2c devices 
Add i2c devices for the CV180x, CV181x and SG200x soc.

Link: https://lore.kernel.org/r/IA1PR20MB49531AA2DBD4832B7926D4A8BB442@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-04-11 17:32:31 +08:00
Inochi Amaoto
4281f8f148 riscv: dts: sophgo: cv18xx: Add spi devices 
Add spi devices for the CV180x, CV181x and SG200x soc.

Link: https://lore.kernel.org/r/IA1PR20MB49532705DE532BCF81CCEFD0BB442@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-04-11 17:32:31 +08:00
Inochi Amaoto
18e8c6d2cc riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC 
Add missing clocks of uart node for CV1800B and CV1812H.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB4953198222C3ABC2A2B6DE21BB262@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-04-11 15:37:50 +08:00
Inochi Amaoto
bb7b341962 riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC 
Add clock generator node for CV1800B and CV1812H.

Until now, It uses DT override to minimize duplication. This may
change in the future. See the last link for the discussion on
maintaining DT of CV1800 series.

Link: 6f4e9b8ecb/duo/datasheet/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf
Link: https://lore.kernel.org/all/IA1PR20MB495373158F3B690EF3BF2901BB8BA@IA1PR20MB4953.namprd20.prod.outlook.com/
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB4953ED6A4B57773865F49D6DBB262@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-04-11 15:28:56 +08:00
Jisheng Zhang
89a7056ed4 riscv: dts: sophgo: add sdcard support for milkv duo 
Add sdhci dt node in SoC dtsi and enable it in milkv duo dts.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/20240217144826.3944-1-jszhang@kernel.org
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-03-27 15:43:33 +08:00
Chen Wang
08573ba006 riscv: dts: add resets property for uart node 
Add resets property for uart0 for completeness, although it is
deasserted by default.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/807f75e433a0f900da40ebb6a448349c98580072.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
 2024-02-23 12:38:03 +08:00
Chen Wang
1ce7587e50 riscv: dts: add reset generator for Sophgo SG2042 SoC 
Add reset generator node to device tree for SG2042.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/b2f5d7cd2d3fccfc00cf4563d2dd7363b0fa2fca.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
 2024-02-23 12:38:03 +08:00
Inochi Amaoto
1f4a994be2 riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format 
Change the timer layout in the dtb to fit the format that needed by
the SBI.

Fixes: 967a94a92a ("riscv: dts: add initial Sophgo SG2042 SoC device tree")
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2024-01-26 13:33:52 +01:00
Linus Torvalds
c4101e5597 Merge tag 'soc-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 
Pull SoC DT updates from Arnd Bergmann:
 "There is one new SoC for each 32-bit Arm and 64-bit RISC-V, but both
  the Rockchips rv1109 and Sopgho CV1812H are just minor variations of
  already supported chips.

  The other six new SoCs are all part of existing arm64 families, but
  are somewhat more interesting:

   - Samsung ExynosAutov920 is an automotive chip, and the first one we
     support based on the Cortex-A78AE core with lockstep mode.

   - Google gs101 (Tensor G1) is the chip used in a number of Pixel
     phones, and is grouped with Samsung Exynos here since it is based
     on the same SoC design, sharing most of its IP blocks with that
     series.

   - MediaTek MT8188 is a new chip used for mid-range tablets and
     Chromebooks, using two Cortex-A78 cores where the older MT8195 had
     four of them.

   - Qualcomm SM8650 (Snapdragon 8 Gen 3) is their current top range
     phone SoC and the first supported chip based on Cortex-X4,
     Cortex-A720 and Cortex-A520.

   - Qualcomm X1E80100 (Snapdragon X Elite) in turn is the latest Laptop
     chip using the custom Oryon cores.

   - Unisoc UMS9620 (Tanggula 7 series) is a 5G phone SoC based on
     Cortex-A76 and Cortex-A55

  In terms of boards, we have

   - Five old Microsoft Lumia phones, the HTC One Mini 2, Motorola Moto
     G 4G, and Huawei Honor 5X/GR5, all based on Snapdragon SoCs.

   - Multiple Rockchips mobile gaming systems (Anbernic RG351V, Powkiddy
     RK2023, Powkiddy X55) along with the Sonoff iHost Smart Home Hub
     and a few Rockchips SBCs

   - Some ComXpress boards based on Marvell CN913x, which is the
     follow-up to Armada 7xxx/8xxx.

   - Six new industrial/embedded boards based on NXP i.MX8 and i.MX9

   - Mediatek MT8183 based Chromebooks from Lenovo, Asus and Acer.

   - Toradex Verdin AM62 Mallow carrier for TI AM62

   - Huashan Pi board based on the SophGo CV1812H RISC-V chip

   - Two boards based on Allwinner H616/H618

   - A number of reference boards for various added SoCs from Qualcomm,
     Mediatek, Google, Samsung, NXP and Spreadtrum

  As usual, there are cleanups and warning fixes across all platforms as
  well as added features for several of them"

* tag 'soc-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (857 commits)
  ARM: dts: usr8200: Fix phy registers
  arm64: dts: intel: minor whitespace cleanup around '='
  arm64: dts: socfpga: agilex: drop redundant status
  arm64: dts: socfpga: agilex: add unit address to soc node
  arm64: dts: socfpga: agilex: move firmware out of soc node
  arm64: dts: socfpga: agilex: move FPGA region out of soc node
  arm64: dts: socfpga: agilex: align pin-controller name with bindings
  arm64: dts: socfpga: stratix10_swvp: drop unsupported DW MSHC properties
  arm64: dts: socfpga: stratix10_socdk: align NAND chip name with bindings
  arm64: dts: socfpga: stratix10: add unit address to soc node
  arm64: dts: socfpga: stratix10: move firmware out of soc node
  arm64: dts: socfpga: stratix10: move FPGA region out of soc node
  arm64: dts: socfpga: stratix10: align pincfg nodes with bindings
  arm64: dts: socfpga: stratix10: add clock-names to DWC2 USB
  arm64: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size
  ARM: dts: socfpga: align NAND controller name with bindings
  ARM: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size
  arm64: dts: rockchip: Fix led pinctrl of lubancat 1
  arm64: dts: rockchip: correct gpio_pwrctrl1 typo on nanopc-t6
  arm64: dts: rockchip: correct gpio_pwrctrl1 typo on rock-5b
  ...
 2024-01-11 11:23:17 -08:00
Inochi Amaoto
2c36b0cfb4 riscv: dts: sophgo: add Huashan Pi board device tree 
Add initial device tree files for the Huashan Pi board.

Note: The boot of CV1812H chip needs a rtos firmware for coprocessor to
function properly. To make the soc happy, reserved the last 2M memory
for the rtos firmware.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://en.sophgo.com/product/introduce/huashan.html
Link: https://en.sophgo.com/product/introduce/cv181xH.html
Link: https://github.com/milkv-duo/duo-buildroot-sdk/blob/develop/build/boards/cv181x/cv1812h_wevb_0007a_emmc_huashan/memmap.py#L15
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-11-30 12:40:36 +00:00
Inochi Amaoto
681ec684a7 riscv: dts: sophgo: add initial CV1812H SoC device tree 
Add initial device tree for the CV1812H RISC-V SoC by SOPHGO.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-11-30 12:40:36 +00:00
Inochi Amaoto
dd791b45c8 riscv: dts: sophgo: cv18xx: Add gpio devices 
Add common GPIO devices for the CV180x and CV181x soc.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-11-30 12:40:36 +00:00
Inochi Amaoto
5b5dce3951 riscv: dts: sophgo: Separate compatible specific for CV1800B soc 
As CV180x and CV181x have the identical layouts, it is OK to use the
cv1800b basic device tree for the whole series.
For CV1800B soc specific compatible, just move them out of the common
file.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-11-30 12:40:36 +00:00
Conor Dooley
e80ed63aff riscv: dts: sophgo: remove address-cells from intc node 
A recent submission [1] from Rob has added additionalProperties: false
to the interrupt-controller child node of RISC-V cpus, highlighting that
the new cv1800b DT has been incorrectly using #address-cells.
It has no child nodes, so #address-cells is not needed. Remove it.

Link: https://patchwork.kernel.org/project/linux-riscv/patch/20230915201946.4184468-1-robh@kernel.org/ [1]
Fixes: c3dffa879c ("riscv: dts: sophgo: add initial CV1800B SoC device tree")
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-11-16 21:43:52 +00:00
Jisheng Zhang
27df2ed3b1 riscv: dts: sophgo: add Milk-V Duo board device tree 
Milk-V Duo[1] board is an embedded development platform based on the
CV1800B chip. Add minimal device tree files for the development board.

Support basic uart drivers, so supports booting to a basic shell.

Link: https://milkv.io/duo [1]
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-10-07 14:17:18 +01:00
Jisheng Zhang
c3dffa879c riscv: dts: sophgo: add initial CV1800B SoC device tree 
Add initial device tree for the CV1800B RISC-V SoC by SOPHGO.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-10-07 14:17:12 +01:00
Chen Wang
9439a0e8b6 riscv: dts: sophgo: add Milk-V Pioneer board device tree 
Milk-V Pioneer [1] is a developer motherboard based on SG2042
in a standard mATX form factor.

Currently only support booting into console with only uart
enabled, other features will be added soon later.

Link: https://milkv.io/pioneer [1]

Reviewed-by: Guo Ren <guoren@kernel.org>
Acked-by: Chao Wei <chao.wei@sophgo.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-10-07 11:17:01 +01:00
Chen Wang
967a94a92a riscv: dts: add initial Sophgo SG2042 SoC device tree 
Milk-V Pioneer motherboard is powered by SG2042.

SG2042 is server grade chip with high performance, low power
consumption and high data throughput.
Key features:
- 64 RISC-V cpu cores
- 4 cores per cluster, 16 clusters on chip
- More info is available at [1].

Currently only support booting into console with only uart,
other features will be added soon later.

Link: https://en.sophgo.com/product/introduce/sg2042.html [1]
Reviewed-by: Guo Ren <guoren@kernel.org>
Acked-by: Chao Wei <chao.wei@sophgo.com>
Co-developed-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com>
Signed-off-by: Xiaoguang Xing <xiaoguang.xing@sophgo.com>
Co-developed-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-10-07 11:16:51 +01:00