raspi/linux
1
0
Fork 1
mirror of https://github.com/raspberrypi/linux.git synced 2025-12-27 12:32:50 +00:00
Code Issues Projects Releases Wiki Activity
1,121,484 Commits 105 Branches 108 Tags
1f24cd31c28178415158366b676c2e18be812940
Commit Graph

265 Commits

Author SHA1 Message Date
Vinod Koul
38b6dbcc94 phy: qcom-qmp-usb: statify qmp_phy_vreg_l 
qmp_phy_vreg_l should be marked static, this resolves warning:

drivers/phy/qualcomm/phy-qcom-qmp-combo.c:616:27: warning: symbol 'qmp_phy_vreg_l' was not declared. Should it be static?

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220708052059.3049443-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-15 17:20:03 +05:30
Dmitry Baryshkov
c1ab64aaac phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register 
Other PHYs tables directly reference QPHY_PLL_LOCK_CHK_DLY_TIME register
without using reglayout. Define corresponding register to be used by
msm8996 PHY tables and use it directly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-29-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:01 +05:30
Dmitry Baryshkov
d36e341a17 phy: qcom-qmp-usb: replace FLL layout writes for msm8996 
Other PHYs tables directly reference FLL registers without using
reglayout. Define corresponding registers to be used by msm8996 PHY
tables and use them directly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-28-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:01 +05:30
Dmitry Baryshkov
9f2fd65fd9 phy: qcom-qmp: pcs-pcie-v4: add missing registers 
Add missing registers, verified against:
- msm-4.19's qcom,kona-qmp-usb3.h

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-27-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:01 +05:30
Dmitry Baryshkov
3599cb6a19 phy: qcom-qmp: pcs-v3: add missing registers 
Add missing registers, verified against:
- msm-4.19's qcom,usb3-11nm-qmp-combo.h

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-26-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:01 +05:30
Dmitry Baryshkov
03baa67f49 phy: qcom-qmp: qserdes-com-v5: add missing registers 
Add missing registers, verified against:
- msm-5.4's qcom,usb3-5nm-qmp-uni.h
- msm-5.4's qcom,usb3-5nm-qmp-combo.h

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-25-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:00 +05:30
Dmitry Baryshkov
1195c1dabf phy: qcom-qmp: qserdes-com-v4: add missing registers 
Add missing registers, verified against:
- msm-4.19's qcom,kona-qmp-usb3.h

The 0x1a0 register name was corrected, verified via msm-4.14's
qcom,sdxprairie-qmp-usb3.h.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-24-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:00 +05:30
Dmitry Baryshkov
d88b3058c0 phy: qcom-qmp: qserdes-com-v3: add missing registers 
Add missing registers, verified against:
- msm-4.4's phy-qcom-ufs-qmp-v3.h

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-23-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:00 +05:30
Dmitry Baryshkov
f7c5cedb60 phy: qcom-qmp: qserdes-com: add missing registers 
Add missing registers, verified against:
- msm-3.18's phy-qcom-ufs-qmp-14nm.h
- msm-3.18's mdss-hdmi-pll-8996.c
- msm-5.4's ep_pcie_phy.h

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-22-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:00 +05:30
Dmitry Baryshkov
fc270d136a phy: qcom-qmp: split PCS_UFS V3 symbols to separate header 
Several registers defined in the PCS V3 namespace in reality belong to
the PCS_UFS V3 register space. Move them to the separate header and
rename them to explicitly mention PCS_UFS. While we are at it, correct
one register in the msm8998_usb3_pcs_tbl table to use PCS register name.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-21-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:00 +05:30
Dmitry Baryshkov
25ad4a4cfe phy: qcom-qmp: split allegedly 4.20 and 5.20 PCS registers 
Split registers definitions belonging allegedly to 4.20 and 5.20 QMP
PHYs. They are used for the PCIe QMP PHYs, which have no good open
source reference.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-20-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:00 +05:30
Dmitry Baryshkov
5fc21d1bd3 phy: qcom-qmp: split allegedly 4.20 and 5.20 TX/RX registers 
Split registers definitions belonging allegedly to 4.20 and 5.20 QMP
PHYs. They are used for the PCIe QMP PHYs, which have no good open
source reference.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-19-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:00 +05:30
Dmitry Baryshkov
87d71378c6 phy: qcom-qmp: move PCIE QHP registers to separate header 
Move PCIE QHP registers to the separate header. QHP is a sepecial PHY
kind used on sdm845 to drive one of PCIe links.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-18-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:00 +05:30
Dmitry Baryshkov
b7a2f88257 phy: qcom-qmp: move PCS V5 registers to separate headers 
Move PCS V5 registers to the separate headers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-17-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:00 +05:30
Dmitry Baryshkov
41ad371f02 phy: qcom-qmp: move PCS V4 registers to separate headers 
Move PCS V4 registers to the separate headers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-16-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:36:00 +05:30
Dmitry Baryshkov
56a1fa0944 phy: qcom-qmp: move PCS V3 registers to separate headers 
Move PCS V3 registers to the separate headers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-15-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
5ae11aa488 phy: qcom-qmp: move PCS V2 registers to separate header 
Move PCS V2 registers to the separate header.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-14-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
147924ffe2 phy: qcom-qmp: move QSERDES PLL registers to separate header 
Move QSERDES PLL registers to the separate header. This register set is
unique for the IPQ PCIe Gen3 PHYs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-13-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
f1f923ad37 phy: qcom-qmp: move QSERDES V5 registers to separate headers 
Move QSERDES V5 registers to the separate headers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-12-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
32d2cf5325 phy: qcom-qmp: move QSERDES V4 registers to separate headers 
Move QSERDES V4 registers to the separate headers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-11-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
a7fc833e2b phy: qcom-qmp: move QSERDES V3 registers to separate headers 
Move QSERDES V3 registers to the separate headers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-10-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
9e1bae6d67 phy: qcom-qmp: move QSERDES registers to separate header 
Move QSERDES V2 registers to the separate header.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-9-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
60f2341447 phy: qcom-qmp: use QPHY_V4_PCS for ipq6018/ipq8074 PCIe gen3 
PCS_COM_* symbols duplicate the QPHY_V4_PCS_*. PCS_PCIE_* symbols
duplicate the QPHY_V4_PCS_PCIE_*. Use generic register names for the
IPQ6018 and IPQ8074 tables and drop the custom PCS_COM_*/PCS_PCIE*
names.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-8-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
6cad29831d phy: qcom-qmp: rename QMP V2 PCS registers 
Rename QMP V2 PCS registers to follow the usual pattern of
QPHY_V2_PCS_*.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-7-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
079328a975 phy: qcom-qmp: drop special QMP V2 PCIE gen3 defines 
Replace separate defines for QMP V2 PHY for PCIe gen3 ports. They are
equivalent to the QSERDES_V4_ symbols.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-6-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
af6643242d phy: qcom-qmp-pcie: split pcs_misc region for ipq6018 pcie gen3 
Follow the example of other PCIe PHYs and use separate pcs_misc region
to access PCS_PCIE_* resources.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-5-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:59 +05:30
Dmitry Baryshkov
fc64623637 phy: qcom-qmp-combo,usb: add support for separate PCS_USB region 
Different QMP USB PHYs might have different offset from PCS to PCS_USB
register space, but the same PCS_USB register layout. Add separate
PCS_USB region space and merge related PCS_USB definitions.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:58 +05:30
Dmitry Baryshkov
2eb2920a05 phy: qcom-qmp-ufs: remove spurious register write in the msm8996 table 
The msm8996_ufs_serdes_tbl table contains write to
QPHY_POWER_DOWN_CONTROL, however this register doesn't belong to the
QSERDES register space. Also the PHY power down is already handled in
the qcom_qmp_phy_ufs_com_init(). Drop this entry completely.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:58 +05:30
Dmitry Baryshkov
488987b2d5 phy: qcom-qmp: fix the QSERDES_V5_COM_CMN_MODE register 
Change QSERDES_V5_COM_CMN_MODE to be defined to 0x1a0 rather than 0x1a4.
The only user of this register name (sm8450_qmp_gen4x2_pcie_serdes_tbl)
should use the 0x1a0 register, as stated in the downstream dtsi tree.

Fixes: 2c91bf6bf2 ("phy: qcom-qmp: Add SM8450 PCIe1 PHY support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:58 +05:30
Kuogee Hsieh
85936d4f38 phy: qcom-qmp: add regulator_set_load to dp phy 
This patch add regulator_set_load() before enable regulator at
DP phy driver.

Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/1657038556-2231-3-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-07 10:35:58 +05:30
Kuogee Hsieh
a4888b2005 phy: qcom-edp: add regulator_set_load to edp phy 
This patch add regulator_set_load() before enable regulator at
eDP phy driver.

Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/1657038556-2231-2-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-06 22:23:58 +05:30
Robert Marko
334fad1854 phy: qcom-qmp-pcie: add IPQ8074 PCIe Gen3 QMP PHY support 
IPQ8074 has 2 different single lane PCIe PHY-s, one Gen2 and one Gen3.
Gen2 one is already supported, so add the support for the Gen3 one.
It uses the same register layout as IPQ6018.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220621195512.1760362-3-robimarko@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-05 12:55:52 +05:30
Robert Marko
2ec9bc8d1b phy: qcom-qmp-pcie: make pipe clock rate configurable 
IPQ8074 Gen3 PCIe PHY uses 250MHz as the pipe clock rate instead of 125MHz
like every other PCIe QMP PHY does, so make it configurable as part of the
qmp_phy_cfg.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220621195512.1760362-1-robimarko@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-05 12:55:52 +05:30
Johan Hovold
fe841d5ba7 phy: qcom-qmp: clean up hex defines 
Use lower case hex consistently for define values.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220609120338.4080-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-05 12:42:32 +05:30
Johan Hovold
b46ae21d0a phy: qcom-qmp: clean up define alignment 
Clean up the QMP defines by removing some stray white space and making
sure values are aligned.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220609120338.4080-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-05 12:42:32 +05:30
Johan Hovold
74acf0ee6e phy: qcom-qmp: clean up v4 and v5 define order 
Clean up the QMP v4 and v5 defines by moving a few entries that were out
of order.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220609120338.4080-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-05 12:42:32 +05:30
Johan Hovold
5d5b7d509f phy: qcom-qmp-usb: clean up pipe clock handling 
Clean up the pipe clock handling by using dev_err_probe() to handle
probe deferral and dropping the obsolete comment that claimed that the
pipe clock was optional for some other PHY types.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220623113314.29761-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-05 12:33:26 +05:30
Johan Hovold
36db6ce1e4 phy: qcom-qmp-pcie-msm8996: drop obsolete pipe clock type check 
Drop the obsolete pipe clock handling which was used to treat the pipe
clock as optional for types other than PCIe and USB and which is no
longer needed since splitting the PHY driver.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220623113314.29761-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-05 12:33:26 +05:30
Johan Hovold
8f662cd9f6 phy: qcom-qmp-pcie: drop obsolete pipe clock type check 
Drop the obsolete pipe clock handling which was used to treat the pipe
clock as optional for types other than PCIe and USB and which is no
longer needed since splitting the PHY driver.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220623113314.29761-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-05 12:33:25 +05:30
Dmitry Baryshkov
5bef2838f1 phy: qcom-qmp: fix PCIe PHY support 
Replace init/exit ops with power_on/power_off which should be used for
the PCIe PHYs to fix PHY initialization.

Fixes: da07a06b90 ("phy: qcom-qmp-pcie: drop support for non-PCIe PHY types")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220610185542.3662484-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-16 17:38:06 -07:00
Dmitry Baryshkov
fbbf71f374 phy: qcom-qmp: fix msm8996 PCIe PHY support 
Replace init/exit ops with power_on/power_off which should be used for
the PCIe PHYs to fix PHY initialization.

Fixes: f575ac2d64 ("phy: qcom-qmp-pcie-msm8996: drop support for non-PCIe PHY types")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220610185542.3662484-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-16 17:38:06 -07:00
Dmitry Baryshkov
e991c2ee65 phy: qcom-qmp-usb: use bulk reset_control API 
Switch qcom-qmp-usb driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-31-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
ccac084746 phy: qcom-qmp-pcie-msm8996: use bulk reset_control API 
Switch qcom-qmp-pcie-msm8996 driver to use reset_control_bulk_assert /
_deassert functions rather than hardcoding the loops in the driver
itself.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-30-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
189ac6b8dd phy: qcom-qmp-pcie: use bulk reset_control API 
Switch qcom-qmp-pcie driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-29-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
1de24861af phy: qcom-qmp-combo: use bulk reset_control API 
Switch qcom-qmp-combo driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-28-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
65753f38f5 phy: qcom-qmp-usb: drop multi-PHY support 
Each USB QMP PHY device provides just a single UFS PHY. Drop support
for handling multiple child PHYs. Use phy->init_count to check if the
PHY was initialized rather than duplicating this count.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-27-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
1da7115efa phy: qcom-qmp-ufs: drop multi-PHY support 
Each UFS QMP PHY device provides just a single UFS PHY. Drop support
for handling multiple child PHYs.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-26-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
1239fd711f phy: qcom-qmp-pcie: drop multi-PHY support 
Each PCIe QMP PHY device provides just a single PCIe PHY. Drop support
for handling multiple child PHYs.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-25-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
faf83af5d5 phy: qcom-qmp-usb: cleanup the driver 
Remove the conditionals and options that are not used by any of USB PHY
devices.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-24-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-09 23:49:42 +05:30
Dmitry Baryshkov
3e1865ba38 phy: qcom-qmp-ufs: cleanup the driver 
Remove the conditionals and options that are not used by any of UFS PHY
devices.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-23-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-06-09 23:49:41 +05:30