Tegra Memory Controller(MC) driver for Tegra20
Added to support MC General interrupts, mainly for IOMMU(GART).
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
DaVinci SoC updates for v3.5
This pull request updates the DaVinci SoC support to implement DEBUG_LL port
choice and optimizes the DMA ISR by removing unnecessary register reads.
* tag 'v3.5-soc' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: optimize the DMA ISR
ARM: davinci: implement DEBUG_LL port choice
+ sync with Linux 3.4-rc6
Signed-off-by: Olof Johansson <olof@lixom.net>
Linus Walleij <linus.walleij@linaro.org> writes:
this pull request contains some device tree work by Lee Jones.
I have tried to keep these patches in the arch/arm/boot/dts/*
space to get some sanity in the branch proliferation.
There is still one patch that touches arch/arm/mach-ux500 too
though (but it should merge fine with the other ux500 stuff).
The changes to the device tree are of course dependent on some
core changes and some patching in the GPIO/pin driver, but as
the device tree files are believed to be a different world
(and should one day live in their own git) I split this off
anyway. I don't think people bisect the device trees per se
and the board code in conjunction anyway.
* 'ux500-devicetree-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Configure the PRCMU Timer for db8500 based devices in DT
ARM: ux500: Enable the SMSC9115 on Snowball via Device Tree
drivers/gpio: represent gpio-nomadik as an IRQ controller in DT documentation
ARM: ux500: Rename gpio_keys in the Device Tree file
drivers/gpio: gpio-nomadik: Provide documentation for Device Tree bindings
drivers/gpio: gpio-nomadik: Device Tree bindings
ARM: ux500: Enable the external bus with Device Tree
ARM: ux500: Shorten Snowball's DT compatible gpio entry
ARM: ux500: Rename the DT compatible entry for i2c devices on Snowball
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
Roland Stigge <stigge@antcom.de> writes:
this is a rearrangement of all mach-lpc32xx specific patches for device
tree conversion. Please note that:
* It builds upon the i2c-pnx changes (see previous pull request, branch
lpc32xx/i2c)
* Dave Miller gave permission to merge the lpc_eth.c change via arm-soc
(patch 1/8)
The rest of the patches is mach-lpc32xx only.
* 'lpc32xx/dt' of git://git.antcom.de/linux-2.6:
ARM: LPC32xx: Defconfig update
ARM: LPC32xx: Move common code to common.c
ARM: LPC32xx: Device tree support
ARM: LPC32xx: DTS files for device tree conversion
ARM: LPC32xx: Remove obsolete platform Kconfig
ARM: LPC32xx: clock.c registration adjustment
ARM: LPC32xx: clock.c cleanup
net: Add device tree support to LPC32xx
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
As a prerequisite for merging the lpc32xx DT changes, this
pulls in the depends/i2c/lpc32xx branch that contains
changes to the pnx-i2c driver, which are already in the
i2c tree. The branch is available also on
git://git.antcom.de/linux-2.6.git lpc32xx/i2c
Roland Stigge <stigge@antcom.de> writes:
this is the series of the 4 patches adding device tree support to i2c-pnx
(used by LPC32xx) that Wolfram Sang already applied to the i2c subsystem.
Since both drivers/i2c/ and mach-lpc32xx are touched here, there will
probably be conflicts that you need to be aware of.
I'm posting this again for arm-soc since the actual mach-lpc32xx specific
DT conversion builds upon those changes (see next pull request), especially
in arch/arm/mach-lpc32xx/common.c.
Wolfram already gave permission to merge this via arm-soc, but please
coordinate and tell me if I can help resolving this.
Further, this implicitly updates the next/dt branch to v3.4-rc4, which
causes a trivial conflict from a change in one branch in code that
gets removed in another.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
Tegra AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced
High-performance Bus (AHB) architecture.
The AHB Arbiter controls AHB bus master arbitration. This effectively
forms a second level of arbitration for access to the memory
controller through the AHB Slave Memory device. The AHB pre-fetch
logic can be configured to enhance performance for devices doing
sequential access. Each AHB master is assigned to either the high or
low priority bin. Both Tegra20/30 have this AHB bus.
Some of configuration params could be passed from DT too if needed.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Conflicts:
drivers/net/ethernet/intel/e1000e/param.c
drivers/net/wireless/iwlwifi/iwl-agn-rx.c
drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c
drivers/net/wireless/iwlwifi/iwl-trans.h
Resolved the iwlwifi conflict with mainline using 3-way diff posted
by John Linville and Stephen Rothwell. In 'net' we added a bug
fix to make iwlwifi report a more accurate skb->truesize but this
conflicted with RX path changes that happened meanwhile in net-next.
In e1000e a conflict arose in the validation code for settings of
adapter->itr. 'net-next' had more sophisticated logic so that
logic was used.
Signed-off-by: David S. Miller <davem@davemloft.net>
The GPIO pins select which sub bus is connected to the master.
Initially tested with an sn74cbtlv3253 switch device wired into the
MDIO bus.
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch adds a somewhat generic framework for MDIO bus
multiplexers. It is modeled on the I2C multiplexer.
The multiplexer is needed if there are multiple PHYs with the same
address connected to the same MDIO bus adepter, or if there is
insufficient electrical drive capability for all the connected PHY
devices.
Conceptually it could look something like this:
------------------
| Control Signal |
--------+---------
|
--------------- --------+------
| MDIO MASTER |---| Multiplexer |
--------------- --+-------+----
| |
C C
h h
i i
l l
d d
| |
--------- A B ---------
| | | | | |
| PHY@1 +-------+ +---+ PHY@1 |
| | | | | |
--------- | | ---------
--------- | | ---------
| | | | | |
| PHY@2 +-------+ +---+ PHY@2 |
| | | |
--------- ---------
This framework configures the bus topology from device tree data. The
mechanics of switching the multiplexer is left to device specific
drivers.
The follow-on patch contains a multiplexer driven by GPIO lines.
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Pull sound sound fixes from Takashi Iwai:
"As good as nothing exciting here; just a few trivial fixes for various
ASoC stuff."
* tag 'sound-3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
ASoC: omap-pcm: Free dma buffers in case of error.
ASoC: s3c2412-i2s: Fix dai registration
ASoC: wm8350: Don't use locally allocated codec struct
ASoC: tlv312aic23: unbreak resume
ASoC: bf5xx-ssm2602: Set DAI format
ASoC: core: check of_property_count_strings failure
ASoC: dt: sgtl5000.txt: Add description for 'reg' field
ASoC: wm_hubs: Make sure we don't disable differential line outputs
This provides full documentation detailing each compulsory,
optional and device (variant) specific properties available
for use within the MMCI Device Tree.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Arnd Bergmann <arndb@arndb.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
SPEAr13xx series of SoCs contain Synopsys AHCI SATA Controller which shares
ahci_platform driver with other controller versions.
This patch updates DT compatible list for ahci_platform. It also updates and
renames binding documentation to more generic name.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
The driver has mux and config support while the gpio is still
not supported.
For select input setting, the driver will handle it internally
and do not need user to take care of it.
The pinctrl-imx core driver will parse the dts file and dynamically
create the pinmux functions and groups.
Each IMX SoC pinctrl driver should register pins with a pin register map
including mux register and config register and select input map to core
for proper operations.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ohci-nxp duplicates the isp1301 driver. This patch removes this code and makes
ohci-nxp use the new separate isp1301 driver instead.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This new driver registers the NXP ISP1301 chip via the I2C subsystem. The chip
is the USB transceiver shared by ohci-nxp, lpc32xx_udc (gadget) and
isp1301_omap.
ISP1301 is a very low-level driver that primarily separates out the I2C client
registration of the ISP1301 chip (including instantiation via DT), used by
other drivers, and declares the chip's registers. It's only a helper driver for
some OHCI and USB device drivers. The driver can be considered as a register
set extension of ohci-nxp, lpc32xx-udc and isp1301_omap, which in turn know
best what to do with the low level functionality (individual ISP1301 registers
and timing, see the different initialization strategies in those drivers).
Those drivers previously internally duplicated ISP1301 register definitions
which is solved by this new isp1301 driver. The ISP1301 registers exposed via
isp1301.h can be accessed by other drivers using it with standard i2c_smbus_*()
accesses.
Following patches let the respective USB host and gadget drivers use this
driver, instead of duplicating ISP1301 handling.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This binding doesn't include the nvidia,model or nvidia,audio-routing
properties the other Tegra audio DT bindings have, because this binding
is targetted at a single machine, rather than for any machine using the
tlv320aic23 codec.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Add runtime DT support and documentation for the Cortex A7/A15
architected timers.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
ULPI PHYs have a reset signal, and different boards use a different GPIO
for this task. Add a property to device tree to represent this.
I'm not sure if adding this property to the EHCI controller node is
entirely correct; perhaps eventually we should have explicit separate
nodes for the various PHYs. However, we don't have that right now, so this
binding seems like a reasonable choice.
Cc: <devicetree-discuss@lists.ozlabs.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: <linux-usb@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch adds device tree support to the LPC32xx's ADC.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Now gpio-nomadik has proper bindings devices initialised by Device Tree
entries are able to use the chained GPIO IRQ lines it provides. This
patch aims to reflect that in the gpio-nmk documentation.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
During the device tree integration of the various LPC32xx drivers,
we agreed on using non-wildcard "compatible" strings. This change
switches lpc32xx_ts touchscreen driver to use "nxp,lpc3220-tsc".
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
This adds pinctrl driver for SPEAr3xx family. SPEAr3xx family supports three
families: SPEAr300, SPEAr310 and SPEAr320.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
This patch adds a generic target for SPEAr3xx machines that can be configured
via the device-tree. Currently the following devices are supported via the
devicetree:
- VIC interrupts
- PL011 UART
- PL061 GPIO
- PL110 CLCD
- SP805 WDT
- Synopsys DW I2C
- Synopsys DW ethernet
- ST FSMC-NAND
- ST SPEAR-SMI
- ST SPEAR-KEYBOARD
- ST SPEAR-RTC
- ARASAN SDHCI-SPEAR
- SPEAR-EHCI
- SPEAR-OHCI
Other peripheral devices will follow in later patches.
This also removes IO_ADDRESS macro and creates 16 MB static mappings instead of
4K for individual peripherals. This is done to have efficient TLB lookup for any
I/O windows that are located closely together. ioremap() on this range will
return this mapping only instead of creating another.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
This patch adds device tree support for lpc_eth.c.
The runtime option for MII/RMII is solved via the "phy-mode" property, SRAM
("IRAM") usage for DMA can be chosen via "use-iram".
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: David S. Miller <davem@davemloft.net>
This patch adds device tree support to the pnx-i2c driver by using platform
resources for memory region and irq and removing dependency on mach includes.
The following platforms are affected:
* PNX
* LPC31xx (WIP)
* LPC32xx
The patch is based on a patch by Jon Smirl, working on lpc31xx integration
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
This change implements device tree support for the LPC32xx SoC's touchscreen
controller.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
This patch adds support to configure the SPEAr EHCI & OHCI driver via
device-tree instead of platform_data.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Define a new binding for the Tegra pin controller, which is capable of
defining all aspects of desired pin multiplexing and pin configuration.
This is all based on the new common pinctrl bindings.
Add Tegra30 binding based on Tegra20 binding.
Add some basic stuff that was missing before:
* How many and what reg property entries must be provided.
* An example.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This places the file in the new location for all pin controller bindings.
Also, rename the file using the full compatible value for easier
avoidance of conflicts between multiple bindings.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The core pin controller bindings define:
* The fact that pin controllers expose pin configurations as nodes in
device tree.
* That the bindings for those pin configuration nodes is defined by the
individual pin controller drivers.
* A standardized set of properties for client devices to define numbered
or named pin configuration states, each referring to some number of the
afore-mentioned pin configuration nodes.
* That the bindings for the client devices determines the set of numbered
or named states that must exist.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch implements the basic single data conversion support for
the SPEAr600 SoC ADC. The register layout of SPEAr600 differs a bit
from other SPEAr SoC variants (e.g. SPEAr3xx). These differences are
handled via DT compatible testing. Resulting in a multi-arch binary.
This driver is currently tested only on SPEAr600. Future patches may add
support for other SoC variants (SPEAr3xx) and features like software
buffer or DMA.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The AHUB (Audio Hub) is a mux/crossbar which links all audio-related
devices except the HDA controller on Tegra30. The devices include the
DMA FIFOs, DAM (Digital Audio Mixers), I2S controllers, and SPDIF
controller. Audio data may be routed between these devices in various
combinations as required by board design/application.
Includes a squashed bugfix from Nikesh Oswal <noswal@nvidia.com>
Includes squashed bugfixes from Sumit Bhattacharya <sumitb@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
