Update the *handle to amdgpu_ip_block ptr for all
functions pointers of hw_fini.
Also update the ip_block ptr where ever needed as
there were cyclic dependency of hw_fini on suspend
and some followed clean up.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Update the *handle to amdgpu_ip_block ptr for all
functions pointers of hw_init.
Also update the ip_block ptr where ever needed as
there were cyclic dependency of hw_init on resume.
v2: squash in isp fix
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
'hqd_registers' used to be used in a member of the 'bonaire_mqd'
struct. 'bonaire_mqd' was removed by
commit 486d807cd9 ("drm/amdgpu: remove duplicate definition of cik_mqd")
It's now unused.
Remove 'hqd_registers' as well.
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The same code is executed when the condition err is true or false,
because the code in the if-then branch and after the if statement is identical
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add the prototype to dump ip registers
for all ips of different asics and set
them to NULL for now. Based on the
requirement add a function pointer for
each of them.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Currently, we store CU info only for a single XCC assuming
that it is the same for all XCCs. However, that may not be
true. As a result, store CU info for all XCCs. This info is
later used for CU masking.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fix the following errors reported by checkpatch:
ERROR: that open brace { should be on the previous line
ERROR: trailing statements should be on next line
ERROR: open brace '{' following struct go on the same line
ERROR: space prohibited before that '++' (ctx:WxB)
Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fix these warnings by adding 'xcc_id' arguments.
gcc with W=1
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:1557: warning: Function parameter or member 'xcc_id' not described in 'gfx_v7_0_select_se_sh'
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c:38: warning: Function parameter or member 'xcc_id' not described in 'amdgpu_gfx_rlc_enter_safe_mode'
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c:62: warning: Function parameter or member 'xcc_id' not described in 'amdgpu_gfx_rlc_exit_safe_mode'
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This patch updates the 'regs2' interface for MMIO
registers to add a new IOCTL command for a 'v2' state
data that includes the XCC ID.
This patch then updates amdgpu_gfx_select_se_sh()
and amdgpu_gfx_select_me_pipe_q() (and the implementations
in the gfx drivers) to support an additional parameter.
This patch then creates a new debugfs interface "gprwave"
which is a merge of shader GPR and wave status access. This
new inteface uses an IOCTL to select banks as well as XCC identity.
(v2) Fix missing xcc_id in wave_ind function
(v3) Fix pm runtime calls and mutex locking
(v4) Fix bad label
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
v1: To support multple XCD case (Le)
v2: unify naming style (Le)
v3: apply the changes to gc v11_0 (Hawking)
v4: apply the changes to gc SOC21 (Morris)
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Morris Zhang <Shiwu.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
To allocate independent queue_bitmap for each XCD,
then the old bitmap policy can be continued to use
with a clear logic.
Use mec_bitmap[0] as default for all non-GC 9.4.3 IPs.
v2: squash commits to avoid breaking the build
v3: unify naming style
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The `amdgpu_ucode_request` helper will ensure that the return code for
missing firmware is -ENODEV so that early_init can fail.
The `amdgpu_ucode_release` helper is for symmetry on unloading.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
It's over a decade ago that this was actually used for more than ring and
IB tests. Just use the static register directly where needed and nuke the
now useless infrastructure.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
As part of the ib padding process, accessing the RLC_SPM_* register may
trigger gfx hang. Since gfxoff may be already kicked during the whole period.
To address that, we manually toggle gfx on/off around the RLC_SPM_*
register access.
This can resolve the gfx hang issue observed on running Talos with RDP launched
in parallel.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add the MODE register into the per-wave debug information.
This register holds state such as FP rounding and denorm
modes, which exceptions are enabled, and active clamping
modes.
Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:1590: warning: Function parameter or member 'instance' not described in 'gfx_v7_0_select_se_sh'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:1788: warning: Excess function parameter 'se_num' description in 'gfx_v7_0_setup_rb'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:1788: warning: Excess function parameter 'sh_per_se' description in 'gfx_v7_0_setup_rb'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:1852: warning: Excess function parameter 'adev' description in 'DEFAULT_SH_MEM_BASES'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2086: warning: Excess function parameter 'adev' description in 'gfx_v7_0_ring_test_ring'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2130: warning: Function parameter or member 'ring' not described in 'gfx_v7_0_ring_emit_hdp_flush'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2130: warning: Excess function parameter 'adev' description in 'gfx_v7_0_ring_emit_hdp_flush'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2130: warning: Excess function parameter 'ridx' description in 'gfx_v7_0_ring_emit_hdp_flush'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Function parameter or member 'ring' not described in 'gfx_v7_0_ring_emit_fence_gfx'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Function parameter or member 'addr' not described in 'gfx_v7_0_ring_emit_fence_gfx'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Function parameter or member 'seq' not described in 'gfx_v7_0_ring_emit_fence_gfx'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Function parameter or member 'flags' not described in 'gfx_v7_0_ring_emit_fence_gfx'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Excess function parameter 'adev' description in 'gfx_v7_0_ring_emit_fence_gfx'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Excess function parameter 'fence' description in 'gfx_v7_0_ring_emit_fence_gfx'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Function parameter or member 'ring' not described in 'gfx_v7_0_ring_emit_fence_compute'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Function parameter or member 'addr' not described in 'gfx_v7_0_ring_emit_fence_compute'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Function parameter or member 'seq' not described in 'gfx_v7_0_ring_emit_fence_compute'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Function parameter or member 'flags' not described in 'gfx_v7_0_ring_emit_fence_compute'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Excess function parameter 'adev' description in 'gfx_v7_0_ring_emit_fence_compute'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Excess function parameter 'fence' description in 'gfx_v7_0_ring_emit_fence_compute'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2260: warning: Function parameter or member 'job' not described in 'gfx_v7_0_ring_emit_ib_gfx'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2260: warning: Function parameter or member 'flags' not described in 'gfx_v7_0_ring_emit_ib_gfx'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2351: warning: Function parameter or member 'timeout' not described in 'gfx_v7_0_ring_test_ib'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:3244: warning: Function parameter or member 'ring' not described in 'gfx_v7_0_ring_emit_vm_flush'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:3244: warning: Function parameter or member 'vmid' not described in 'gfx_v7_0_ring_emit_vm_flush'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:3244: warning: Function parameter or member 'pd_addr' not described in 'gfx_v7_0_ring_emit_vm_flush'
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:3244: warning: Excess function parameter 'adev' description in 'gfx_v7_0_ring_emit_vm_flush'
Acked-by: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-media@vger.kernel.org
Cc: linaro-mm-sig@lists.linaro.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add a helper so we can set per asic default values. Also,
the module parameter is currently clamped to 8, but clamp it
per asic just in case some asics have different limits in the
future. Enable the option on gfx6,7 as well for consistency.
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The KFD VMID assignment was hard-coded in a few places. Consolidate that in
a single variable adev->vm_manager.first_kfd_vmid. The value is still
assigned in gmc-ip-version-specific code.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Generate HW IP's sched_list in amdgpu_ring_init() instead of
amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(),
ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary.
This patch also stores sched_list for all HW IPs in one big
array in struct amdgpu_device which makes amdgpu_ctx_init_entity()
much more leaner.
v2:
fix a coding style issue
do not use drm hw_ip const to populate amdgpu_ring_type enum
v3:
remove ctx reference and move sched array and num_sched to a struct
use num_scheds to detect uninitialized scheduler list
v4:
use array_index_nospec for user space controlled variables
fix possible checkpatch.pl warnings
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
When we stop the HW for example for GPU reset we should not stop the
front-end scheduler. Otherwise we run into intermediate failures during
command submission.
The scheduler should only be stopped in very few cases:
1. We can't get the hardware working in ring or IB test after a GPU reset.
2. The KIQ scheduler is not used in the front-end and should be disabled during GPU reset.
3. In amdgpu_ring_fini() when the driver unloads.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Test-by: Dennis Li <dennis.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
We have three ib pools, they are normal, VM, direct pools.
Any jobs which schedule IBs without dependence on gpu scheduler should
use DIRECT pool.
Any jobs schedule direct VM update IBs should use VM pool.
Any other jobs use NORMAL pool.
v2: squash in coding style fix
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
SPM_VMID is a global resource, SPM access the video memory according to
SPM_VMID. The initial valude of SPM_VMID is 0 which is used by kernel.
That means UMD can overwrite the memory of VMID0 by enabling SPM, that
is really dangerous.
Initialize SPM_VMID with 0xf, it messes up other user mode process at
most.
v2: squash in indentation fix
Signed-off-by: Jacob He <jacob.he@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
