MADT Multiprocessor Wakeup structure version 1 brings support for CPU offlining:
BIOS provides a reset vector where the CPU has to jump to for offlining itself.
The new TEST mailbox command can be used to test whether the CPU offlined itself
which means the BIOS has control over the CPU and can online it again via the
ACPI MADT wakeup method.
Add CPU offlining support for the ACPI MADT wakeup method by implementing custom
cpu_die(), play_dead() and stop_this_cpu() SMP operations.
CPU offlining makes it possible to hand over secondary CPUs over kexec, not
limiting the second kernel to a single CPU.
The change conforms to the approved ACPI spec change proposal. See the Link.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Kai Huang <kai.huang@intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Tested-by: Tao Liu <ltao@redhat.com>
Link: https://lore.kernel.org/all/13356251.uLZWGnKmhe@kreacher
Link: https://lore.kernel.org/r/20240614095904.1345461-19-kirill.shutemov@linux.intel.com
In order to support MADT wakeup structure version 1, provide more appropriate
names for the fields in the structure.
Rename 'mailbox_version' to 'version'. This field signifies the version of the
structure and the related protocols, rather than the version of the mailbox.
This field has not been utilized in the code thus far.
Rename 'base_address' to 'mailbox_address' to clarify the kind of address it
represents. In version 1, the structure includes the reset vector address. Clear
and distinct naming helps to prevent any confusion.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Kai Huang <kai.huang@intel.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Tested-by: Tao Liu <ltao@redhat.com>
Link: https://lore.kernel.org/r/20240614095904.1345461-15-kirill.shutemov@linux.intel.com
Merge ACPI device enumeration changes and ACPI data-only tables support
updates for 6.10:
- Rearrange fields in several structures to effectively eliminate
computations from container_of() in some cases (Andy Shevchenko).
- Do some assorted cleanups of the ACPI device enumeration code (Andy
Shevchenko).
- Make the ACPI device enumeration code skip devices with _STA values
clearly identified by the specification as invalid (Rafael Wysocki).
- Rework the handling of the NHLT table to simplify and clarify it and
drop some obsolete pieces (Cezary Rojewski).
* acpi-scan:
ACPI: scan: Avoid enumerating devices with clearly invalid _STA values
ACPI: scan: Introduce typedef:s for struct acpi_hotplug_context members
ACPI: scan: Use standard error checking pattern
ACPI: scan: Move misleading comment to acpi_dma_configure_id()
ACPI: scan: Use list_first_entry_or_null() in acpi_device_hid()
ACPI: bus: Don't use "proxy" headers
ACPI: bus: Make container_of() no-op where it makes sense
* acpi-tables:
ACPI: NHLT: Streamline struct naming
ACPI: NHLT: Drop redundant types
ACPI: NHLT: Introduce API for the table
ACPI: NHLT: Reintroduce types the table consists of
ACPICA commit c581606cf49b7574d29c02b1a3bc144650375e32
Add support for ACPI RAS2 feature table(RAS2) defined in the ACPI 6.5
Specification & upwards revision, section 5.2.21.
The RAS2 table provides interfaces for platform RAS features. RAS2 offers
the same services as RASF, but is more scalable than the latter.
RAS2 supports independent RAS controls and capabilities for a given RAS
feature for multiple instances of the same component in a given system.
The platform can support either RAS2 or RASF but not both.
Link: https://github.com/acpica/acpica/commit/c581606c
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Few recently introduced structs are named 'nhlt2' instead of 'nhlt' to
avoid naming conflicts. With duplicate types gone, the conflicts are no
more.
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe
Non HDAudio Link Table (NHLT) is designed to separate hardware-related
description (registers) from AudioDSP firmware-related one i.e.:
pipelines and modules that together make up the audio stream on Intel
DSPs. This task is important as same set of hardware registers can be
used with different topologies and vice versa, same topology could be
utilized with different set of hardware. As the hardware registers
description is directly tied to specific platform, intention is to have
such description part of low-level firmware e.g.: BIOS.
The initial design has been provided in early Sky Lake (SKL) days. The
audio architecture goes by the name cAVS. SKL is a representative of
cAVS 1.5. The table helps describe endpoint capabilities ever since.
While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to
be precise - its successor, the ACE architecture which begun with
Meteor Lake (MTL) inherited the design for all I2S and PDM
configurations. These two configurations are the primary targets for
NHLT table.
Due to naming conflicts with existing code, several structs are named
'nhlt2' rather than 'nhlt'. Follow up changes clean this up once
existing code has no users and is removed.
Link: https://github.com/acpica/acpica/pull/912
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 2eded5a6a13d892b7dc3be6096e7b1e8d4407600
Update RHCT table with below details.
1) Add additional structure to describe the Cache Management
Operation (CMO) related information.
2) Add structure to describe MMU type.
3) Convert the current reserved field to flags and define
a flag to indicate timer capability.
This codefirst ECR is approved by UEFI forum and will
be part of next ACPI spec version.
Link: https://github.com/acpica/acpica/commit/2eded5a6
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 8c048cee4ea7b9ded8db3e1b3b9c14e21e084a2c
This adds 3 different external interrupt controller
definitions in MADT for RISC-V.
1) RISC-V PLIC is a platform interrupt controller for
handling wired interrupt in a RISC-V systems.
2) RISC-V IMSIC is MSI interrupt controller to
support MSI interrupts.
3) RISC-V APLIC has dual functionality. First it can
act like PLIC and direct all wired interrupts to
the CPU which doesn't have MSI controller. Second,
when the CPU has MSI controller (IMSIC), it will
act as a converter from wired interrupts to MSI.
Update the existing RINTC structure also to support
these external interrupt controllers.
This codefirst ECR is approved by UEFI forum and will
be part of next ACPI spec version.
Link: https://github.com/acpica/acpica/commit/8c048cee
Signed-off-by: Haibo, Xu <haibo1.xu@intel.com>
Co-developed-by: Haibo, Xu <haibo1.xu@intel.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit e66decc6fca36b59194b0947d87d6a9bec078bc3
Similar to "Replace one-element array with flexible-array", replace the
1-element array with a proper flexible array member as defined by C99.
This allows the code to operate without tripping compile-time and run-
time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds,
and/or -fstrict-flex-arrays=3).
Unlike struct acpi_nfit_flush_address and struct acpi_nfit_smbios, which
had their sizeof() uses adjusted in code, struct acpi_nfit_interleave did
not. This appears to have been a bug. After this change, there is a binary
difference in acpi_dm_dump_nfit() since the size of the structure now has
the correct size, as the prior result was including the trailing U32:
- mov $0x14,%ebp
+ mov $0x10,%ebp
Link: https://github.com/acpica/acpica/commit/e66decc6
Signed-off-by: Bob Moore <robert.moore@intel.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Tested-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 44f1af0664599e87bebc3a1260692baa27b2f264
Similar to "Replace one-element array with flexible-array", replace the
1-element array with a proper flexible array member as defined by C99.
This allows the code to operate without tripping compile-time and run-
time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds,
and/or -fstrict-flex-arrays=3).
The sizeof() uses with struct acpi_nfit_flush_address and struct
acpi_nfit_smbios have been adjusted to drop the open-coded subtraction
of the trailing single element. The result is no binary differences in
.text nor .data sections.
Link: https://github.com/acpica/acpica/commit/44f1af06
Signed-off-by: Bob Moore <robert.moore@intel.com>
Co-developed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit f0c4a06f1dfc4886d4e0c2aa30bc57b10c5a8c53
Like many tables, this is a header followed by multiple subtables of
varying self-identifying types, and ACPICA does not normally add a field
for the subtables, instead relying on pointer arithmetic past the end of
the first header struct, since indexing a flexible array member is
meaningless for variable-length entries. If we really wanted a field for
this, we could use a u8 flexible array member, but it contradicts the
current style. Using void *, however, is categorically wrong, as ACPI
tables never contain native C-language pointers.
Link: https://github.com/acpica/acpica/commit/f0c4a06f
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 87a2e39b8abdfedfb86b0a105708e37e895becd9
IORT revision is now updated to E.d (ARM DEN 0049E.d) and
contains a few additions like,
-Added descriptor in the root complex node for specifying
PASID width supported by the root complex.
-Updated RMR node Flags field.
-Introduced memory access attributes in the RMR node.
Please note that IORT Rev E.c is deprecated and not supported.
Link: https://github.com/acpica/acpica/commit/87a2e39b
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 002165ecc0a3dc703bb24c789aaa02fdada01675
The specification of this table is described in
"ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document"
ARM DEN0117.
This patch adds the necessary types and support for
compiling/disassembling APMT.
Link: https://github.com/acpica/acpica/commit/002165ec
Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 23a659e190cf3ed0edd46cddf12bbbcfeaa09396
specific_config has 4 bytes of size and then an amount of bytes specified
by size. All of the terminators that I've seen had a size equal to 4, but
theoretically it can vary.
Link: https://github.com/acpica/acpica/commit/23a659e1
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit cf36a6d658ca5aa8c329c2edfc3322c095ffd844
Add support for Arm Generic Diagnostic Dump and Reset Interface, which is
described by "ACPI for Arm Components 1.1 Platform Design Document"
ARM DEN0093.
Add the necessary types in the ACPICA header files and support for
compiling and decompiling the table.
Link: https://github.com/acpica/acpica/commit/cf36a6d6
Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 13b9327761955f6e1e5dbf748b3112940c0dc539
The byte length of the Data field in the AEST Processor generic resource
substructure defined in ACPI for the Armv8 RAS Extensions 1.1 is 4Byte.
However, it is defined as a pointer type, and on a 64-bit machine,
it is interpreted as 8 bytes. Therefore, it is changed from a pointer
type unsigned integer 1 byte to an unsigned integer 4 bytes.
Link: https://github.com/acpica/acpica/commit/13b93277
Signed-off-by: Shuuichirou Ishii <ishii.shuuichir@fujitsu.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Merge x86-specific ACPI updates, ACPI resources management updates,
one ACPI device enumeration update and miscellaneous ACPI updates for
5.16-rc1:
- Avoid flushing caches before entering C3 type of idle states on
AMD processors (Deepak Sharma).
- Avoid enumerating CPUs that are not present and not online-capable
according to the platform firmware (Mario Limonciello).
- Add DMI-based mechanism to quirk IRQ overrides and use it for two
platforms (Hui Wang).
- Change the configuration of unused ACPI device objects to reflect
the D3cold power state after enumerating devices (Rafael Wysocki).
- Update MAINTAINERS information regarding ACPI (Rafael Wysocki).
- Fix typo in ACPI Kconfig (Masanari Iid).
- Use sysfs_emit() instead of snprintf() in some places (Qing Wang).
* acpi-x86:
x86: ACPI: cstate: Optimize C3 entry on AMD CPUs
x86/ACPI: Don't add CPUs that are not online capable
ACPICA: Add support for MADT online enabled bit
* acpi-resources:
ACPI: resources: Add one more Medion model in IRQ override quirk
ACPI: resources: Add DMI-based legacy IRQ override quirk
* acpi-scan:
ACPI: scan: Release PM resources blocked by unused objects
* acpi-misc:
ACPI: replace snprintf() in "show" functions with sysfs_emit()
ACPI: Update information in MAINTAINERS
ACPI: Kconfig: Fix a typo in Kconfig
ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf
Note: support for Vendor-defined microphone arrays and SNR extensions
are not supported at this time -- mostly due to a lack of example tables.
Actual compiler support for NHLT is forthcoming.
Link: https://github.com/acpica/acpica/commit/94abe858
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit bd46cb07e614fd85ea69e54c1f6f0ae0a5fb20ab
This structure is used in to parse PRMT in other Operating Systems
that relies on using subtable headers in order to parse ACPI tables.
Although the PRMT doesn't have "subtables" it has a list of module
information structures that act as subtables.
Link: https://github.com/acpica/acpica/commit/bd46cb07
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
