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70711 Commits

Author SHA1 Message Date
Ville Syrjälä
9a55a62085 drm/i915: Rename 'tmp_mask' 
Replace this silly tmp_mask with hotplug_trigger/te_trigger
where appropriate.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-16-ville.syrjala@linux.intel.com
 2020-10-30 14:53:14 +02:00
Ville Syrjälä
f6576e460d drm/i915: Don't enable hpd detection logic from irq_postinstall() 
No reason that I can see why we should enable the hpd detection logic
already during irq postinstall phase. We don't even do this on all
the platforms. We just need it before we actually enable the hotplug
interrupts in .hpd_irq_setup(), and in fact we already do it there as
well. Let's just eliminate the redundant early setup.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-15-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
 2020-10-30 14:52:44 +02:00
Ville Syrjälä
52c7f5f183 drm/i915: Split gen11_hpd_detection_setup() into tc vs. tbt variants 
No reason to stuff both type-c and tbt into the same function.
Let's split this so we may more easily handle platforms that
lack the tbt spefific bits.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-14-ville.syrjala@linux.intel.com
 2020-10-30 14:48:38 +02:00
Ville Syrjälä
a0e066b8de drm/i915: Relocate intel_hpd_{enabled,hotplug}_irqs() 
Move intel_hpd_{enabled,hotplug}_irqs() closes to the beginning of
the file so we can use them in more places. No functional changes.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-13-ville.syrjala@linux.intel.com
 2020-10-30 14:48:30 +02:00
Ville Syrjälä
9701135950 drm/i915: s/tc_port/hpd_pin/ in icp+ TC hotplug bits 
Parametrize the icp+ TC HPD bits using hpd_pin rather than
tc_port so it's clear what kind of an animal we're dealing
with.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-12-ville.syrjala@linux.intel.com
 2020-10-30 14:48:25 +02:00
Ville Syrjälä
5b76e86001 drm/i915: s/tc_port/hpd_pin/ in GEN11_{TC,TBT}_HOTPLUG() 
Use hpd_pin instead of tc_port in the GEN11_{TC,TBT}_HOTPLUG()
to make it clear what they refer to.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-11-ville.syrjala@linux.intel.com
 2020-10-30 14:48:21 +02:00
Ville Syrjälä
5f371a8197 drm/i915: s/port/hpd_pin/ for icp+ ddi hpd bits 
Use hpd_pin instead of port in the parametrized ICP+ DDI HPD
macros. Makes it clear what these refer to.

v2: Handle DG1

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-10-ville.syrjala@linux.intel.com
 2020-10-30 14:48:15 +02:00
Ville Syrjälä
e5abaab30e drm/i915: Introduce GEN8_DE_PORT_HOTPLUG() 
Unify the BDW/BXT hotplug bits. BDW only has port A, but that
matches BXT port A so we can shar the same macro for both.

v2: Remember the gvt

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-9-ville.syrjala@linux.intel.com
 2020-10-30 14:48:04 +02:00
Ville Syrjälä
8625b221f3 drm/i915: Parametrize BXT_DE_PORT_HP_DDI with hpd_pin 
Use hpd_pin to parametrize BXT_DE_PORT_HP_DDI() to make it clear
these have nothing to do with DDI ports or PHYs as such. The only
thing that matters is the HPD pin assignment.

v2: Remember the gvt

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-8-ville.syrjala@linux.intel.com
 2020-10-30 14:47:59 +02:00
Ville Syrjälä
580bf195cb drm/i915: Use AUX_CH_USBCn for the RKL VBT AUX CH setup 
As with the VBT DVO port, RKL uses PHY based mapping for the
VBT AUX CH. Adjust the code to use the new AUX_USBCn names
and add a comment to explain the situation.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-7-ville.syrjala@linux.intel.com
 2020-10-30 14:47:52 +02:00
Ville Syrjälä
570fe6ef6a drm/i915: Pimp AUX CH names 
Let's make the AUX CH names match the spec (AUX A-F for pre-tgl,
AUX A-C or AUX USBC1-6 for tgl+). And while at it let's include
the full encoder name in the AUX CH name as well (as opposed to
just using port_name() which wouldn't give us the right thing on
tgl+).

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-6-ville.syrjala@linux.intel.com
 2020-10-30 14:47:46 +02:00
Ville Syrjälä
df034b973d drm/i915: Introduce AUX_CH_USBCn 
Just like with the DDIs tgl+ renamed the AUX CHs to reflect
the type of the DDI. Let's add the aliasing enum values for
the type-C AUX CHs.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-5-ville.syrjala@linux.intel.com
 2020-10-30 14:47:37 +02:00
Ville Syrjälä
2d709a5a62 drm/i915: Give DDI encoders even better names 
Let's pimp the DDI encoder->name to reflect what the spec calls them.
Ie. on pre-tgl DDI A-F, on tgl+ DDI A-C or DDI TC1-6.

Also since each encoder is really a combination of the DDI and the PHY
we include the PHY name as well.

ICL is a bit special since it already has the two different types
of DDIs (combo or TC) but it still calls them just DDI A-F regarless
of the type. For that let's add an extra "(TC)" note to remind
is which type of DDI it really is.

The code is darn ugly, but not sure there's much we can do about it.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-4-ville.syrjala@linux.intel.com
 2020-10-30 14:47:15 +02:00
Ville Syrjälä
1d8ca00245 drm/i915: Add PORT_TCn aliases to enum port 
Since tgl the DDIs have been named A,B,C,TC1,TC2,TC3...
Add the appropriate enum values for the TC DDIs to enum port.

v2: Deal with rkl and dg1

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-3-ville.syrjala@linux.intel.com
 2020-10-30 14:47:07 +02:00
Ville Syrjälä
320c670c04 drm/i915: s/PORT_TC/TC_PORT_/ 
Make the namespacing for enum tc_port better by adding
the TC_ to the actual enum values.

v2: Drop the extra TC (Lucas)

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-2-ville.syrjala@linux.intel.com
 2020-10-30 14:46:58 +02:00
Steven Price
a17d609e3e drm/panfrost: Don't corrupt the queue mutex on open/close 
The mutex within the panfrost_queue_state should have the lifetime of
the queue, however it was erroneously initialised/destroyed during
panfrost_job_{open,close} which is called every time a client
opens/closes the drm node.

Move the initialisation/destruction to panfrost_job_{init,fini} where it
belongs.

Fixes: 1a11a88cfd ("drm/panfrost: Fix job timeout handling")
Signed-off-by: Steven Price <steven.price@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201029170047.30564-1-steven.price@arm.com
 2020-10-30 10:10:08 +01:00
Robin Murphy
268af50f38 drm/panfrost: Support cache-coherent integrations 
When the GPU's ACE-Lite interface is fully wired up and capable of
snooping CPU caches, it may be described as "dma-coherent" in
devicetree, which will already inform the DMA layer not to perform
unnecessary cache maintenance. However, we still need to ensure that
the GPU uses the appropriate cacheable outer-shareable attributes in
order to generate the requisite snoop signals, and that CPU mappings
don't create a mismatch by using a non-cacheable type either.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7024ce18c1cb1a226e918037d49175571db0b436.1600780574.git.robin.murphy@arm.com
 2020-10-30 10:08:08 +01:00
Alex Deucher
3e269eeea4 drm/amdgpu/powerplay: Only apply optimized mclk dpm policy on polaris 
Leads to improper dpm on older parts.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1353
Fixes: 8d89b96fe7 ("drm/amd/powerplay: optimize the mclk dpm policy settings")
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:18:54 -04:00
Evan Quan
786436b453 drm/amd/pm: do not use ixFEATURE_STATUS for checking smc running 
This reverts commit f878122841 ("drm/amdgpu:
Fix bug where DPM is not enabled after hibernate and resume").
It was intended to fix Hawaii S4(hibernation) issue but break S3. As
ixFEATURE_STATUS is filled with garbage data on resume which can be
only cleared by reloading smc firmware(but that will involve many
changes). So, we will revert this S4 fix and seek a new way.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:18:21 -04:00
Evan Quan
277b080f98 drm/amd/pm: perform SMC reset on suspend/hibernation 
So that the succeeding resume can be performed based on
a clean state.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:18:04 -04:00
Evan Quan
2a4776a733 drm/amd/pm: enable baco reset for Hawaii 
Which can be used for S4(hibernation) support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:17:43 -04:00
Evan Quan
c108725ef5 drm/amd/pm: correct the baco reset sequence for CI ASICs 
Correct some registers bitmasks and add mmBIOS_SCRATCH_7
reset.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:17:08 -04:00
Evan Quan
253475c455 drm/amdgpu: perform srbm soft reset always on SDMA resume 
This can address the random SDMA hang after pci config reset
seen on Hawaii.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:16:54 -04:00
Flora Cui
4f0a1c99aa drm/amdgpu: rename nv_is_headless_sku() 
for headless NAVI ASICs

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:16:02 -04:00
Flora Cui
06a5af1f62 drm/amdgpu: disable DCN and VCN for Navi14 0x7340/C9 SKU 
Navi14 0x7340/C9 SKU has no display and video support, remove them.

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:15:47 -04:00
Bhaskar Chowdhury
c07a013a28 drivers: amdgpu: Correct spelling defalut to default in comment 
Correct spelling in one of the comment.

s/defalut/default/p

Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:03:10 -04:00
Arnd Bergmann
a110f3750b drm/amdgpu: fix incorrect enum type 
core_link_write_dpcd() returns enum dc_status, not ddc_result:

display/dc/core/dc_link_dp.c: In function 'dp_set_panel_mode':
display/dc/core/dc_link_dp.c:4237:11: warning: implicit conversion from 'enum dc_status' to 'enum ddc_result'
[-Wenum-conversion]

Avoid the warning by using the correct enum in the caller.

Fixes: 0b22632243 ("drm/amd/display: Synchronous DisplayPort Link Training")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:03:05 -04:00
Tom Rix
0b924cd60d drm/amd/display: remove unneeded semicolon 
A semicolon is not needed after a switch statement.

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:03:02 -04:00
Tom Rix
aec576f9d2 drm/amdgpu: remove unneeded semicolon 
A semicolon is not needed after a switch statement.

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:02:26 -04:00
Colin Ian King
9e89ee9be1 drm/amd/pm: fix out-of-bound read on pptable->SkuReserved 
A recent change added two uint16_t elements to PPTable_t and reduced the
uint32_t array down to 8 elements. This results in the dev_info printing
of pptable->SkuReserved[8] accessing a value that is out-of-range on
array SkuReserved.  The array has been shrunk by 1 element, so remove
this extraneous dev_info message.

Addresses-Coverity: ("Out-of-bounds read")
Fixes: 1dc3c5a95b ("drm/amd/pm: update driver if file for sienna cichlid")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:02:18 -04:00
Zou Wei
cfeb1055e5 drm/amd/display: remove useless if/else 
Fix the following coccinelle report:

./drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:1367:3-5:
WARNING: possible condition with no effect (if == else)

Both branches are the same, so remove the if/else altogether.

Fixes: 81875979f0 ("drm/amd/display: Remove extra pairs of parentheses in dce_calcs.c")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:02:13 -04:00
Alex Deucher
15047bd436 drm/amdgpu: drop CONFIG_DRM_AMD_DC_DCN3_01 from atomfirmware.h 
Not needed.

Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:02:10 -04:00
Alex Deucher
48e3c2e711 drm/amdgpu/display: remove dal_cmd_tbl_helper_dcn2_get_table2 
It's unused and identical to dal_cmd_tbl_helper_dce112_get_table2.

Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:02:07 -04:00
Alex Deucher
9e245188fb drm/amdgpu/display: remove DRM_AMD_DC_GREEN_SARDINE 
No need for a separate config option at this point.

Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:02:03 -04:00
Alex Deucher
158d823f07 drm/amdgpu/powerplay: Only apply optimized mclk dpm policy on polaris 
Leads to improper dpm on older parts.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1353
Fixes: 8d89b96fe7 ("drm/amd/powerplay: optimize the mclk dpm policy settings")
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:01:58 -04:00
Evan Quan
52934da275 drm/amd/pm: do not use ixFEATURE_STATUS for checking smc running 
This reverts commit f878122841 ("drm/amdgpu:
Fix bug where DPM is not enabled after hibernate and resume").
It was intended to fix Hawaii S4(hibernation) issue but break S3. As
ixFEATURE_STATUS is filled with garbage data on resume which can be
only cleared by reloading smc firmware(but that will involve many
changes). So, we will revert this S4 fix and seek a new way.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:00:50 -04:00
Evan Quan
e6bd6890e8 drm/amd/pm: perform SMC reset on suspend/hibernation 
So that the succeeding resume can be performed based on
a clean state.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:00:43 -04:00
Evan Quan
0134022fa3 drm/amd/pm: enable baco reset for Hawaii 
Which can be used for S4(hibernation) support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:00:36 -04:00
Evan Quan
8a76ccd199 drm/amd/pm: correct the baco reset sequence for CI ASICs 
Correct some registers bitmasks and add mmBIOS_SCRATCH_7
reset.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:00:27 -04:00
Evan Quan
aad6d96a09 drm/amdgpu: perform srbm soft reset always on SDMA resume 
This can address the random SDMA hang after pci config reset
seen on Hawaii.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:00:19 -04:00
Chengming Gui
93b96255bd drm/amd/amdgpu: simplify pa_sc_tile_steering_override check 
Use ">= CHIP_SIENNA_CICHLID" to replace per asic check

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking.Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:00:11 -04:00
Jinzhou.Su
e3a8a5acb9 amdgpu:Add flag for updating MGCG on GFX10 
Add RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 01:00:03 -04:00
Christian König
e389871983 drm/amdgpu: cleanup gmc_v9_0_process_interrupt 
First of all don't snprintf into a char buffer allocated on the stack with
a constant hubname.

Then cleanup to exit the function early in case of a ratelimit or SRIOV.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:59:56 -04:00
Dmytro Laktyushkin
e0457659f8 drm/amd/display: allow 18 bit dp output on DCN3 
We need this to pass dp compliance.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Nikola Cornij <nikola.cornij@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:59:49 -04:00
Kent Russell
d95c368ab8 drm/amdkfd: Fix getting unique_id in topology 
Since the unique_id is now obtained in amdgpu in smu_late_init,
topology misses getting the value during KFD device initialization.
To work around this, we use amdgpu_amdkfd_get_unique_id to get
the unique_id at read time. Due to this, we can remove unique_id from
the kfd_dev structure, since we only need it in the KFD node properties
struct

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:59:42 -04:00
Jinzhou.Su
51a7e93826 amdgpu: Add GFX MGCG and MGLS for vangogh 
add GFX Medium Grain Light Sleep support for vangogh

add AMD_CG_SUPPORT_GFX_CP_LS and AMD_CG_SUPPORT_GFX_RLC_LS

v2:
  add GFX Medium Grain Clock Gating

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:58:50 -04:00
Xiaojian Du
802a46d384 drm/amd/pm: enable the rest functions of swSMU for vangogh. 
This patch is to enable the rest functions of swSMU for vangogh.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:58:44 -04:00
Xiaojian Du
271ab489f7 drm/amd/pm: add some swSMU functions for vangogh. 
This patch is to add some swSMU functions for vangogh, to support the
sensor info on "hwmon" and pm info.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:58:38 -04:00
Xiaojian Du
ac70c6c62a drm/amd/pm: add one new function to get 32 bit feature mask for vangogh 
This patch is to add one new function to get 32 bit feature mask for
vangogh.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:58:32 -04:00
Xiaojian Du
10f279cbd7 drm/amd/pm: remove some redundant smu message mapping for vangogh 
This patch is to remove some redundant smu message mapping for vangogh.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:58:26 -04:00