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167 Commits

Author SHA1 Message Date
Alex Deucher
a7ea6548a5 drm/amdgpu: setup the shared and private apertures on gfx9 
Same as previous asics.  This was not yet set for gfx9.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-15 17:15:09 -05:00
Alex Deucher
bf383fb64e drm/amdgpu: convert nbio to use callbacks (v2) 
Cleans up and consolidates all of the per-asic logic.

v2: squash in "drm/amdgpu: fix NULL err for sriov detect" (Chunming)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-13 17:28:07 -05:00
Monk Liu
f4534f0654 drm/amdgpu: fix MAP_QUEUES paramter 
Should be 0.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-12 14:50:05 -05:00
Christian König
3de676d8e7 drm/amdgpu: allow get_vm_pde to change flags as well 
And also provide the level for which we need a PDE.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-12 14:46:19 -05:00
Shaoyun Liu
4fd09a19a6 drm/admgpu: Reduce the usage of soc15ip.h 
Remove the header where it's not used.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:35:19 -05:00
Shaoyun Liu
cd29253f65 drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset 
Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:32:24 -05:00
Shaoyun Liu
946a4d5b30 drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array 
Handle dynamic offsets correctly in static arrays.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:18:51 -05:00
Feifei Xu
fb960bd283 drm/amd/include:cleanup vega10 header files. 
Remove asic_reg/vega10 folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:22 -05:00
Feifei Xu
cde5c34f63 drm/amd/include:cleanup vega10 gc header files. 
Cleanup asic_reg/vega10/GC folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:20 -05:00
Feifei Xu
75199b8c7f drm/amd/include:cleanup vega10 hdp header files. 
Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:16 -05:00
Monk Liu
84e5b5161e drm/amdgpu:free CSA in unified place 
instead of doing it in each GFX ip's sw_fini

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:51 -05:00
Christian König
c47b41a79a drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result 
Not sure what that should originally been good for, but it doesn't seem
to make any sense any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:21 -05:00
Monk Liu
13a752e3a2 drm/amdgpu:cleanup in_sriov_reset and lock_reset 
since now gpu reset is unified with gpu_recover
for both bare-metal and SR-IOV:

1)rename in_sriov_reset to in_gpu_reset
2)move lock_reset from adev->virt to adev

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:41:31 -05:00
pding
1366b2d016 drm/amdgpu: avoid soft lockup when waiting for RLC serdes (v2) 
Normally all waiting get timeout if there's one.
Release the lock and return immediately when timeout happens.

v2:
 - set the se_sh to broadcase before return

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: pding <Pixel.Ding@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:33:13 -05:00
pding
9953b72f9c drm/amdgpu: change redundant init logs to debug level 
When this VF stays in exclusive mode for long, other VFs will be
impacted.

The redundant messages causes exclusive mode timeout when they're
redirected. That is a normal use case for cloud service to redirect
guest log to virtual serial port.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: pding <Pixel.Ding@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 16:33:12 -05:00
Monk Liu
9862def99d drm/amdgpu:fix memleak 
those RLC used buffers are not cleared in GFX's sw_fini

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-11-16 13:36:24 -05:00
Nicolai Hähnle
822770ad49 drm/amdgpu/gfx9: implement wave VGPR reading 
This is already hooked up to the "amdgpu_gpr" debugfs file used by
the umr userspace debugging tool.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-11-13 14:35:21 -05:00
Ken Wang
f5eaffccf1 drm/amdgpu: Add common golden settings for GFX9 
Signed-off-by: Ken Wang <Ken.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-11-13 14:34:21 -05:00
Jérémy Lefaure
c1b24a1405 drm/amdgpu: use ARRAY_SIZE 
Using the ARRAY_SIZE macro improves the readability of the code.

Found with Coccinelle with the following semantic patch:
@r depends on (org || report)@
type T;
T[] E;
position p;
@@
(
 (sizeof(E)@p /sizeof(*E))
|
 (sizeof(E)@p /sizeof(E[...]))
|
 (sizeof(E)@p /sizeof(T))
)

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-10-19 15:27:11 -04:00
Dave Airlie
c6622f3afc amdgpu/nbio: use constant nbio_hdp_flush_reg structs. 
This removes the init path as well, since the init path
just did some constant init of some structs.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-29 12:24:39 -04:00
Dave Airlie
d81a220949 amdgfx/gfx: don't use static objects for ce/de meta. (v2) 
This isn't safe if we have multiple GPUs plugged in, since
there is only one copy of this struct in the bss, just allocate
on stack, it's 40/108 bytes which should be safe.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-29 12:24:36 -04:00
Monk Liu
c833d8aa4d drm/amdgpu:fix firmware memoryleak(v2) 
this fix memory leak due to request_firmware after driver
unloaded

v2:
release gmc firmware for gmc6/7/8 as well

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:25 -04:00
Monk Liu
85f95ad629 drm/amdgpu:unmap KCQ in gfx hw_fini(v2) 
v2:
move kcq_disable out of SRIOV, make it genearal

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:23 -04:00
Monk Liu
f840cc5f84 drm/amdgpu/sriov:init csb for gfxv9 
RLC need CSB registers initiated under SRIOV during world switch
otherwise the clear state buffer behav will not be recovered to
current VF scheme after switch back

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:12 -04:00
Monk Liu
030308fcbd drm/amdgpu/sriov:fix page fault issue of driver unload 
bo_free on csa is too late to put in amdgpu_fini because that
time ttm is already finished,
Move it earlier to avoid the page fault.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:11 -04:00
Monk Liu
6e2e216fad drm/amdgpu:use formal register to trigger hdp invalidate 
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:10 -04:00
Monk Liu
2ea6ab2741 drm/amdgpu:insert TMZ_BEGIN 
FRAME_CONTROL(begin) is needed for vega10 due to ucode logic change,
it can fix some CTS random fail under gfx preemption enabled mode.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:09 -04:00
Monk Liu
3224a12b90 drm/amdgpu/sriov:move in_reset to adev and rename 
currently in_reset is only used in sriov gpu reset, and it
will be used for other non-gfx hw component later, like
PSP, so move it from gfx to adev and rename to in_sriov_reset
make more sense.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 15:14:08 -04:00
Alex Deucher
29c3035fe3 drm/amdgpu/gfx9: properly set the hdp flush reg for Raven 
Was only being assigned for vega10.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-12 14:32:43 -04:00
Tom St Denis
f6886c4726 drm/amd/amdgpu: Support full range of GFX ring names 
Right now there's only one but the rest of the code is being
setup to support more so might as well fix this up too.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-01 12:50:53 -04:00
Tom St Denis
2b9bdfa70f drm/amd/amdgpu: Simplify gfx_v9_0_wait_for_idle() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:06 -04:00
Tom St Denis
78888cff5c drm/amd/amdgpu: Fix indentation in gfx_v9_0_mqd_init() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:05 -04:00
Tom St Denis
b08796cee1 drm/amd/amdgpu: Tidy up gfx_v9_0_rlc_stop() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:05 -04:00
Tom St Denis
e567fa69f2 drm/amd/amdgpu: Tidy up gfx_v9_0_enable_gfx_dynamic_mg_power_gating() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:04 -04:00
Tom St Denis
7915c8fd7e drm/amd/amdgpu: Tidy up gfx_v9_0_enable_gfx_static_mg_power_gating() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:03 -04:00
Tom St Denis
513f81332a drm/amd/amdgpu: Tidy up gfx_v9_0_enable_gfx_pipeline_powergating() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:03 -04:00
Tom St Denis
f55ee212ee drm/amd/amdgpu: Tidy up gfx_v9_0_enable_gfx_cg_power_gating() 
Make it consistent in style with the other CG/PG enable functions...

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:02 -04:00
Tom St Denis
54cfe0fc54 drm/amd/amdgpu: Tidy up gfx_v9_0_enable_cp_power_gating() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:02 -04:00
Tom St Denis
b926fe8efc drm/amd/amdgpu: Tidy up gfx_v9_0_enable_sck_slow_down_on_power_down() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:01 -04:00
Tom St Denis
e24c7f06db drm/amd/amdgpu: Tidy up gfx_v9_0_enable_sck_slow_down_on_power_up() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:00 -04:00
Tom St Denis
0e5293d07b drm/amd/amdgpu: Tidy up gfx_v9_0_enable_save_restore_machine() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:01:00 -04:00
Tom St Denis
91629eff74 drm/amd/amdgpu: Tidy up gfx_v9_0_ngg_en() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:00:59 -04:00
Tom St Denis
35c32f20a7 drm/amd/amdgpu: Tidy up register list formatting. 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-31 15:00:59 -04:00
Alex Deucher
ffe6d881e9 drm/amdgpu/gfx9: adjust mqd allocation size 
To allocate additional space for the dynamic cu masks.
Confirmed with the hw team that we only need 1 dword
for the mask.  The mask is the same for each SE so
you only need 1 dword.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-29 15:28:00 -04:00
Ken Wang
d5de797ff1 drm/amdgpu: fix vega10 graphic hang issue in S3 test 
mmVGT_INDEX_TYPE has no default value, need to make sure
it's initialized when gfx is initialized.

Signed-off-by: Ken Wang <Ken.Wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-18 12:02:11 -04:00
Huang Rui
fa04b6ba14 drm/amdgpu: set gfx_v9_0_ip_funcs as static 
We won't use this member in other files, so set it static.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:46:13 -04:00
Christian König
078af1a3e9 drm/amdgpu: use amdgpu_bo_free_kernel more often 
Saves us even more loc.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:45:57 -04:00
Christian König
a4a0277789 drm/amdgpu: use amdgpu_bo_create_kernel more often 
Saves us quite a bunch of loc.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:45:56 -04:00
Evan Quan
ba219b3c18 drm/amdgpu: update vega10 golden setting 
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Ken Wang <ken.wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:45:51 -04:00
Huang Rui
6a05148f48 drm/amdgpu: fix the incorrect scratch reg number on gfx v9 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-07-25 16:36:39 -04:00