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58279 Commits

Author SHA1 Message Date
Hawking Zhang
63fa48db49 drm/amdgpu: switch to amdgpu_ras_late_init for gfx v9 block (v2) 
call helper function in late init phase to handle ras init
for gfx ip block

v2: call ras_late_fini to do clean up when fail to enable interrupt

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-09-13 17:11:04 -05:00
Hawking Zhang
b293e891b0 drm/amdgpu: add helper function to do common ras_late_init/fini (v3) 
In late_init for ras, the helper function will be used to
1). disable ras feature if the IP block is masked as disabled
2). send enable feature command if the ip block was masked as enabled
3). create debugfs/sysfs node per IP block
4). register interrupt handler

v2: check ih_info.cb to decide add interrupt handler or not

v3: add ras_late_fini for cleanup all the ras fs node and remove
interrupt handler

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-09-13 17:11:04 -05:00
Hawking Zhang
a344db8e5e drm/amdgpu: poll ras_controller_irq and err_event_athub_irq status 
For the hardware that can not enable BIF ring for IH cookies for both
ras_controller_irq and err_event_athub_irq, the driver has to poll the
status register in irq handling and ack the hardware properly when there
is interrupt triggered

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-09-13 17:11:04 -05:00
Hawking Zhang
4e644fffb5 drm/amdgpu: add ras_controller and err_event_athub interrupt support 
Ras controller interrupt and Ras err event athub interrupt are two dedicated
interrupts for RAS support.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-09-13 17:11:04 -05:00
Hawking Zhang
fc098fb4ed drm/amdgpu: update nbio v7_4 ip header files 
Add mmBIF_INTR_CNTL and its shift mask.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-09-13 17:11:04 -05:00
Hawking Zhang
b8d312aa07 drm/amdgpu: add nbif v7_4 irq source header for vega20 
nbif v7_4 interrupt source definition

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-09-13 17:11:04 -05:00
Hawking Zhang
4241863afc drm/amdgpu/nbio: add functions to query ras specific interrupt status 
ras_controller_interrupt and err_event_interrupt are ras specific interrupts.
add functions to check their status and ack them if they are generated. both
funcitons should only be invoked in ISR when BIF ring is disabled or even not
initialized.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-09-13 17:11:03 -05:00
Hawking Zhang
bebc076285 drm/amdgpu: switch to new amdgpu_nbio structure 
no functional change, just switch to new structures

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-09-13 17:11:03 -05:00
Hawking Zhang
078ef4e932 drm/amdgpu: add new amdgpu nbio header file 
More nbio funcitonalities will be added and nbio could
be treated as an ip block like gfx/sdma.etc

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-09-13 17:11:03 -05:00
Dave Airlie
9a60b2990d Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm-next 
single etnaviv fix for an error path.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Lucas Stach <l.stach@pengutronix.de>
Link: https://patchwork.freedesktop.org/patch/msgid/4ae00cfb47c8e6fffca5dbb45ae9370cd4e5eaf4.camel@pengutronix.de
 2019-09-06 16:58:10 +10:00
Dave Airlie
9ed45a209a Merge tag 'drm-next-5.4-2019-08-30' of git://people.freedesktop.org/~agd5f/linux into drm-next 
drm-next-5.4-2019-08-30:

amdgpu:
- Add DC support for Renoir
- Add some GPUVM hw bug workarounds
- add support for the smu11 i2c controller
- GPU reset vram lost bug fixes
- Navi1x powergating fixes
- Navi12 power fixes
- Renoir power fixes
- Misc bug fixes and cleanups

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190830212650.5055-1-alexander.deucher@amd.com
 2019-09-06 16:40:28 +10:00
Wei Yongjun
dbcc574a4b drm/etnaviv: fix missing unlock on error in etnaviv_iommuv1_context_alloc() 
Add the missing unlock before return from function etnaviv_iommuv1_context_alloc()
in the error handling case.

Fixes: 27b67278e0 ("drm/etnaviv: rework MMU handling")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
 2019-09-02 12:48:55 +02:00
Sam Ravnborg
226024b166 drm/exynos: drop use of drmP.h 
There was a few uses of drmP that was missed in the last
patch removing this header from exynos.

Remove the final uses of this header.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Joonyoung Shim <jy0922.shim@samsung.com>
Cc: Seung-Woo Kim <sw0312.kim@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Jingoo Han <jingoohan1@gmail.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
 2019-09-01 20:55:12 +09:00
Austin Kim
9c9284f9ce drm/amdgpu: Move null pointer dereference check 
Null pointer dereference check should have been checked,
ahead of below routine.
	struct amdgpu_device *adev = hwmgr->adev;

With this commit, it could avoid potential NULL dereference.

Signed-off-by: Austin Kim <austindh.kim@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-30 15:37:17 -05:00
Petr Cvek
20c14ee135 drm/amdgpu: Fix undefined dm_ip_block for navi12 
There is missing "if defined" CONFIG_DRM_AMD_DC block for non DC
configurations. This will cause link error. The patch is fixing that.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=110979
Signed-off-by: Petr Cvek <petrcvekcz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-30 15:37:17 -05:00
Aaron Liu
537e3bbfee drm/amdgpu: fix no interrupt issue for renoir emu (v2) 
In renoir's vega10_ih model, there's a security change in mmIH_CHICKEN
register, that limits IH to use physical address (FBPA, GPA) directly.
Those chicken bits need to be programmed first.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-30 15:37:17 -05:00
Aaron Liu
7596625588 drm/amdgpu: update IH_CHICKEN in oss 4.0 IP header for VG/RV series 
In Renoir's emulator, those chicken bits need to be programmed.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-30 15:37:17 -05:00
Aaron Liu
ea1fc5e1ff drm/amd/powerplay: SMU_MSG_OverridePcieParameters is unsupport for APU 
For apu, SMU_MSG_OverridePcieParameters is unsupport.
So return directly in smu_override_pcie_parameters function.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-30 15:37:17 -05:00
Andrey Grodzovsky
0b2d2c2eec drm/amdgpu: Handle job is NULL use case in amdgpu_device_gpu_recover 
This should be checked at all places job is accessed.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-30 15:02:39 -05:00
Roman Li
e1c14c4339 drm/amdgpu: Enable DC on Renoir 
Enable DC support for renoir.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:34 -05:00
Roman Li
542816ff16 drm/amd/display: Add DCN2.1 changes to DML 
Hook up the DML changes for renoir.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:34 -05:00
Roman Li
f82effc4e5 drm/amd/display: Correct order of RV family clk managers for Renoir 
Need to check for renoir first.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
07842d54b9 drm/amd/display: add Renoir to kconfig 
Add a kconfig option to enable renoir.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
25f9955b15 drm/amd/display: build dcn21 blocks 
Enable the building of dcn21 support.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
aa91916770 drm/amd/display: add dcn21 core DC changes 
Add missing parameters, to make dcn21 compile
without errors

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
dd44a63386 drm/amd/display: add dal_asic_id for renoir 
Add the rev id for renoir.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
1b2c7b2c6d drm/amd/display: call update_bw_bounding_box 
call update_bw_bounding_box in DC construct

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
30221ad875 drm/amd/display: Handle Renoir in amdgpu_dm (v2) 
Hook up renoir support to KMS.

v2: squash in "Fixes for Renoir in amdgpu_dm"

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
e22ece54ee drm/amd/display: Handle Renoir in DC 
add Renoir DCN version in DC and handle it

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
aad37f2606 drm/amd/display: Fix register names 
rename VM_CONTEXT0 to  MMVM_CONTEXT0 as that is the name defined in
the register files

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
b04641a3f4 drm/amd/display: Add Renoir DML 
DML provides the display configuration validation as provided
by the hw teams.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
64ce485c48 drm/amd/display: Add Renoir GPIO 
Misc display related configuration details.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
6f4e6361c3 drm/amd/display: Add Renoir resource (v2) 
Manages the renoir display resources (crtcs, phys, plls, etc.).

v2: rebase (Alex)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
4edb6fc918 drm/amd/display: Add Renoir clock manager 
Controls display clocks and interfaces with powerplay for
clock and power requirements.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
6f451b60e0 drm/amd/display: Add Renoir Hubbub (v2) 
Controls the display hw's interface to memory.

v2: rebase (Alex)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
35b82ba8f2 drm/amd/display: Add Renoir hubbub registers list 
These are the registers used to program the hubbub hw.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
eced51f9ba drm/amd/display: Add hubp block for Renoir (v2) 
This provides the interface to memory for the display hw.

v2: minor cleanup (Alex)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
1e768c5b0f drm/amd/display: Add Renoir irq_services (v2) 
Provides the interface to configure display interrrupts on renoir.

v2: rebase fix (Alex)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
82f9146832 drm/amd/display: Add pp_smu functions for Renoir 
This defines the interface for communicating requirements
between DC and powerplay.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
ab61831227 drm/amd/display: Add Renoir hw_seq register list 
These are the registers used to for the hw sequences
for modesetting.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00
Bhawanpreet Lakha
ff54ecb095 drm/amd/display: Add Renoir clock registers list 
These are the registers used to program the clock hw.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00
Bhawanpreet Lakha
b593bce59b drm/amd/display: Add Renoir registers (v3) 
add registers for dcn, clk, and renoir ip offsets

v2: header cleanup (Alex)
v3: Add DPCS registers (Hersen)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00
Prike Liang
eee3258e8f drm/amd/powerplay: add the interface for getting ultimate frequency v3 
add the get_dpm_ultimate_freq for supporting different swSMU.
-v2:
        Handle the unsupported clock type and read smc message failed case and return error code.
        Move the smu12 uclk frequency retrieved logic to renoir ppt.
-v3:
        Use goto clause to handle invalidate clk index.
        Add the limited tag for smu_get_dpm_uclk to avoid other likewise interface introduced.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00
Prike Liang
296ae1038d drm/amd/powerplay: enable populate DPM clocks table for swSMU APU 
Should populate DPM clocks tables during hw init,otherwise will
suffer from invalidate table.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00
Prike Liang
ffe61cd642 drm/amd/powerplay: regards the APU always enable the dpm feature mask 
There is no driver message to enable/disable feature mask for APU.
For the sake of APU reusing swSMU interface and assume APU supports all
the feature.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00
Prike Liang
334ffd0daa drm/amdgpu: Initialize and update SDMA power gating 
Init SDMA HW base configuration and enable idle INT for rn.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00
Tianci.Yin
12842d02c7 drm/amdgpu/psp: keep TMR in visible vram region for SRIOV 
Fix compute ring test failure in sriov scenario.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00
Tianci.Yin
994dcfaa7e drm/amdgpu: keep the stolen memory in visible vram region 
stolen memory should be fixed in visible region.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00
Colin Ian King
92ead9fa6f drm/amdgpu: fix spelling mistake "jumpimng" -> "jumping" 
There is a spelling mistake in a DRM_DEBUG_DRIVER debug message.
Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00
Alex Deucher
53fd9b5ae8 drm/amdgpu/virtual_dce: drop error message in hw_init 
No need to add new asic cases.  This is a sw display
implementation, so just drop the error message so when
we add new asics, all we have to do is add the virtual
dce IP module.

Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-29 15:52:32 -05:00