Kathiravan Thirumoorthy
ed02ca7ff3
clk: qcom: ipq5332: drop the CLK_SET_RATE_PARENT flag from GPLL clocks
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[ Upstream commit 5635ef0bd13d89d52970quic_kathirav@quicinc.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Link: https://lore.kernel.org/r/20230913-gpll_cleanup-v2-5-c8ceb1a37680@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2023-11-20 11:59:07 +01:00
Varadarajan Narayanan
7c619b827c
clk: qcom: ipq5332: Drop set rate parent from gpll0 dependent clocks
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[ Upstream commit ccd8ab03063d89d52970quic_varada@quicinc.com >
Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com >
Link: https://lore.kernel.org/r/1693474133-10467-1-git-send-email-quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2023-11-20 11:59:04 +01:00
Stephen Boyd
41680df097
Merge branch 'clk-qcom' into clk-next
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* clk-qcom: (87 commits)
clk: qcom: Fix SM_GPUCC_8450 dependencies
clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC
clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags
clk: qcom: gcc-ipq5018: change some variable static
clk: qcom: gcc-ipq4019: add missing networking resets
dt-bindings: clock: qcom: ipq4019: add missing networking resets
clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC
dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
clk: qcom: gcc-qdu1000: Update the RCGs ops
clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops
clk: qcom: gcc-qdu1000: Add support for GDSCs
clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support
clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock
clk: qcom: gcc-qdu1000: Fix clkref clocks handling
clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling
dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs
clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock
clk: qcom: ipq5332: drop the mem noc clocks
clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks
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2023-08-30 14:39:58 -07:00
Kathiravan T
90d5c043dd
clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock
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With the removal of the mem noc clocks in the commit e224dc703521 ("clk:
qcom: gcc-ipq5332: drop the mem noc clocks"), we can drop the
gcc_apss_axi_clk_src clock as well, since there are no clocks uses this
clock as a parent.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com >
Link: https://lore.kernel.org/r/20230710102807.1189942-3-quic_kathirav@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2023-08-13 19:56:50 -07:00
Kathiravan T
1784d031ef
clk: qcom: ipq5332: drop the mem noc clocks
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Due to the recent design changes, all the mem noc clocks will be
configured by the bootloaders and it will be access protected by the TZ
firmware. So drop these clocks from the GCC driver.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com >
Link: https://lore.kernel.org/r/20230710102807.1189942-2-quic_kathirav@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2023-08-13 19:56:50 -07:00
Rob Herring
a96cbb146a
clk: Explicitly include correct DT includes
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The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.
Acked-by: Dinh Nguyen <dinguyen@kernel.org >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org > # samsung
Acked-by: Heiko Stuebner <heiko@sntech.de > #rockchip
Acked-by: Chanwoo Choi <cw00.choi@samsung.com >
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be >
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com >
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com > # versaclock5
Signed-off-by: Rob Herring <robh@kernel.org >
Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org
Acked-by: Abel Vesa <abel.vesa@linaro.org > #imx
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2023-07-19 13:13:16 -07:00
Kathiravan T
7510e80f4a
clk: qcom: ipq5332: fix the order of SLEEP_CLK and XO clock
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The order of DT_SLEEP_CLK and DT_XO are swapped and it is incorrect.
Due to which the clocks for which the parent should be XO is having parent
as SLEEP_CLK and vice versa. So fix the same by re-ordering the entries.
Fixes: 3d89d52970quic_devipriy@quicinc.com >
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230417105607.4091-1-quic_kathirav@quicinc.com
2023-05-26 13:29:32 -07:00
Kathiravan T
81c1ef89a4
clk: qcom: ipq5332: fix the src parameter in ftbl_gcc_apss_axi_clk_src
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480MHz is derived from P_GPLL4_OUT_AUX not from P_GPLL4_OUT_MAIN. Update
the freq_tbl with the correct src.
Fixes: 3d89d52970quic_mmanikan@quicinc.com >
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230417044342.9406-1-quic_kathirav@quicinc.com
2023-05-26 13:29:23 -07:00
Kathiravan T
a30e62bf6b
clk: qcom: gcc: ipq5332: Use floor ops for SDCC clocks
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SDCC clocks must be rounded down to avoid overclocking the controller.
Fixes: 3d89d52970quic_kathirav@quicinc.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230508163145.9678-1-quic_kathirav@quicinc.com
2023-05-24 19:29:09 -07:00
Kathiravan T
377c0b46d8
clk: qcom: ipq5332: mark GPLL4 as ignore unused temporarily
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Clock framework disables the GPLL4 source since there are no active users
for this source currently. Some of the clocks initialized by the
bootloaders uses the GPLL4 as the source. Due to this, when the GPLL4 is
disabled by the clock framework, system is going for the reboot.
To avoid this, mark the GPLL4 as ignore unused so that clock framework
doesn't disable it. Once the users of this source is enabled, we can get
rid of this flag.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230307062232.4889-6-quic_kathirav@quicinc.com
2023-03-15 16:22:15 -07:00
Kathiravan T
3d89d52970
clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC
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Add support for the global clock controller found on IPQ5332 SoC. PLL
used on IPQ5332 is of type Stromer Plus PLL, however the programming
sequence is same as Stromer PLL, so lets re-use the Stromer PLL ops.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230307062232.4889-5-quic_kathirav@quicinc.com
2023-03-15 16:22:15 -07:00
