Emily Deng
f2bcc0c7db
drm/amdgpu/mmsch: Correct the definition for mmsch init header
...
For the header, it is version related, shouldn't use MAX_VCN_INSTANCES.
Signed-off-by: Emily Deng <Emily.Deng@amd.com >
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2023-06-09 12:44:12 -04:00
Jane Jian
bf35dbc135
drm/amdgpu/jpeg: enable jpeg v4_0 for sriov
...
- skip direct jpeg registers read&write since it is not allowed
- reset Doorbell range layout for sriov
Signed-off-by: Jane Jian <Jane.Jian@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2023-03-22 00:47:59 -04:00
Jane Jian
ecb41b71ef
drm/amdgpu/vcn: re-use original vcn0 doorbell value
...
root cause that S2A need to use deduct offset flag.
after setting this flag, vcn0 doorbell value works.
so return it as before
Signed-off-by: Jane Jian <Jane.Jian@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-11-23 09:01:54 -05:00
Jane Jian
63127922e1
drm/amdgpu/vcn: Add MMSCH v4_0 support for sriov
...
These structures are basically ported from MMSCH v3_0,
besides, added RB and RB4 enablement flag to support
unified queue
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Jane Jian <Jane.Jian@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-09-01 15:12:14 -04:00
