3 Commits

Author	SHA1	Message	Date
David Daney	47d979eca3	MIPS: Hook Cavium OCTEON cache init into cache.c ... Follow precedent of other boards, and hook-up the CPU specific cache init. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2009-01-11 09:57:22 +00:00
Ralf Baechle	c46b302b94	MIPS: New feature test macro cpu_has_mips_r ... cpu_has_mips_r is true if a processor is MIPS32 or MIPS64, any architecture revision. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2008-10-30 14:44:33 +00:00
Ralf Baechle	384740dc49	MIPS: Move headfiles to new location below arch/mips/include ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2008-10-11 16:18:52 +01:00