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15900 Commits

Author SHA1 Message Date
Tim Huang
9e5da94259 drm/amdgpu: fix uninitialized variable warning for jpeg_v4 
Clear warning that using uninitialized variable r.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:05 -04:00
Yang Wang
329cec8f18 drm/amdgpu: fix RAS unload driver issue in SRIOV 
Fix null pointer issue when unload driver in SRIOV mode.

Adjust the function position to ensure that the amdgpu_mca/aca_xxx_init()
related functions can be initialized properly.

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:05 -04:00
Yang Wang
85a24a3ea0 drm/amdgpu: ignoring unsupported ras blocks when MCA bank dispatches 
This patch is used to solve the problem of incorrect parsing of error counts.
When the UE trigger gpu is reset, the driver will attempt to parse all possible ras blocks.
For ras blocks that are not supported by the current ASIC, the driver should ignore this error.

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Candice Li <candice.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:05 -04:00
Tim Huang
8f184f8e7a drm/amdgpu: fix uninitialized variable warning for amdgpu_xgmi 
Clear warning that using uninitialized variable current_node.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:05 -04:00
Tim Huang
3aa6b72045 drm/amdgpu: fix uninitialized variable warning for sdma_v7 
Clear warning that using uninitialized variable index.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:05 -04:00
Ma Jun
be1684930f drm/amdgpu: Fix out-of-bounds write warning 
Check the ring type value to fix the out-of-bounds
write warning

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:05 -04:00
Ma Jun
7e39d7ec35 drm/amdgpu: Fix the uninitialized variable warning 
Check the user input and phy_id value range to fix
"Using uninitialized value phy_id"

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:04 -04:00
Jack Xiao
56fd1f8868 drm/amdgpu/mes11: fix kiq ring ready flag 
kiq ring test has overwitten ready flag,
need disable after gfx hw init.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:04 -04:00
Lang Yu
89773b8559 drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs 
Small APUs(i.e., consumer, embedded products) usually have a small
carveout device memory which can't satisfy most compute workloads
memory allocation requirements.

We can't even run a Basic MNIST Example with a default 512MB carveout.
https://github.com/pytorch/examples/tree/main/mnist. Error Log:

"torch.cuda.OutOfMemoryError: HIP out of memory. Tried to allocate
84.00 MiB. GPU 0 has a total capacity of 512.00 MiB of which 0 bytes
is free. Of the allocated memory 103.83 MiB is allocated by PyTorch,
and 22.17 MiB is reserved by PyTorch but unallocated"

Though we can change BIOS settings to enlarge carveout size,
which is inflexible and may bring complaint. On the other hand,
the memory resource can't be effectively used between host and device.

The solution is MI300A approach, i.e., let VRAM allocations go to GTT.
Then device and host can flexibly and effectively share memory resource.

v2: Report local_mem_size_private as 0. (Felix)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:04 -04:00
Sunil Khatri
3b3c9e865e drm/amdgpu: add se registers to ip dump for gfx10 
add the registers of SE block of gfx for ip dump
for gfx10 IP.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:04 -04:00
Sunil Khatri
b4e394e843 drm/amdgpu: add CP headers registers to gfx10 dump 
add registers in the ip dump for CP headers in gfx10

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 15:17:04 -04:00
Ville Syrjälä
d26238c680 drm/amdgpu: Use drm_crtc_vblank_crtc() 
Replace the open coded drm_crtc_vblank_crtc() with the real
thing.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240408190611.24914-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-08 21:55:30 +03:00
Sunil Khatri
b0923d5d80 drm/amdgpu: remove ip dump reg_count variable 
reg_count is not used and the register count is
directly derived from the array size and hence
removed.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-03 09:06:47 -04:00
Asad Kamal
6cd2b87264 drm/amd/amdgpu: Check tbo resource pointer 
Validate tbo resource pointer, skip if NULL

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:18 -04:00
Kenneth Feng
3474e02ed5 drm/amd/pm: support mode1 reset on smu_v14_0_3 
support mode1 reset on smu_v14_0_3

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Alex Deucher
ade887c633 drm/amdgpu/mes12: Use a separate fence per transaction 
We can't use a shared fence location because each transaction
should be considered independently.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Alex Deucher
94b51a3d01 drm/amdgpu/mes12: increase mes submission timeout 
MES internally has a timeout allowance of 2 seconds.
Increase driver timeout to 3 seconds to be safe.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Alex Deucher
b1d852920b drm/amdgpu/mes12: print MES opcodes rather than numbers 
Makes it easier to review the logs when there are MES
errors.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Kenneth Feng
174fdc07c0 drm/amd/amdgpu: enable mmhub and athub cg on gc 12.0.1 
enable mmhub and athub cg on gc 12.0.1

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Kenneth Feng
dd8707295d drm/amd/amdgpu: enable gfxoff on gc 12.0.1 
Enable gfxoff on gc 12.0.1

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Likun Gao
b9f5d0f978 drm/amdgpu: support cg state get for gfx v12 
Support to get clockgating state for gfx v12.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Kenneth Feng
598a3b753a drm/amd/amdgpu: enable sram fgcg on gc 12.0.1 
enable sram fgcg on gc 12.0.1

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Kenneth Feng
6f6bb3909c drm/amd/amdgpu: enable perfcounter mgcg and repeater fgcg 
enable perfcounter mgcg and repeater fgcg on gc 12.0.1

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Kenneth Feng
0b6662eb2a drm/amd/amdgpu: enable 3D cgcg and 3D cgls 
enable 3D cgcg and 3D cgls on gc 12.0.1

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Kenneth Feng
af472f68c7 drm/amd/amdgpu: enable mgcg on gfx 12.0.1 
enable mgcg on gfx 12.0.1

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Kenneth Feng
81b09cedb3 drm/amd/amdgpu: enable cgcg and cgls 
enable cgcg and cgls on gc 12.0.1

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
David (Ming Qiang) Wu
856d1ed4b2 drm/amdgpu/vcn5: Add VCN5 capabilities 
Add VCN5 encode and decode capabilities support

Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Sonny Jiang
117f851393 drm/amdgpu/vcn5: enable DPG mode support 
Enable DPG mode

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Sonny Jiang
f19cfce87d drm/amdgpu/jpeg5: enable power gating 
Enable PG on JPEG5

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
David (Ming Qiang) Wu
f8f8e95c5f amdgpu/vcn: enable AMD_PG_SUPPORT_VCN 
turn on AMD_PG_SUPPORT_VCN flag for power saving

Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
David Belanger
da43e93d1b drm/amdgpu: Fix physical address mask 
Mask should be 44-bit.

Signed-off-by: David Belanger <david.belanger@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Likun Gao
0a75dc9831 drm/amdgpu/discovery: add mes v12_0 ip block 
Add mes v12_0 ip block.

v2: squash in update (Alex)
v3: rebase on unified mes changes (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Likun Gao
5e676d7180 drm/amdgpu/discovery: add gfx v12_0 ip block 
Add gfx v12_0 ip block.

v2: Squash in update (Alex)
v3: add exp flag (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Jack Xiao
03f4b8c3ca drm/amdgpu/mes12: disable logging output 
Random page fault was oberserved, temporarily disable
mes log buffer output.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Jack Xiao
3dc434ad26 drm/amdgpu: add module parameter 'amdgpu_uni_mes' 
Add module parameter 'amdgpu_uni_mes' to enable/disable unified
mes fw support.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Jack Xiao
ad5c0a79df drm/amdgpu/mes12: add legacy setting hw resource interface 
For unified mes fw, add the legacy interface to set hardware
resources.

v2: remove warning (Alex)

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
shaoyunl
fcc5df722d drm/amdgpu: Disable unmapped doorbell handling basic mode on mes 12 
The new mechanism for unmapped doorbell handling requires both driver side and
MES fw side change. The FW side changes are still not released.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Jack Xiao
663bbfaf68 drm/amdgpu/gfx: enable mes to map legacy queue support 
Enable mes to map legacy queue support.

v2: drop unused gfx_v12_0_kiq_enable_kgq() (Alex)

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Jack Xiao
4c2439f908 drm/amdgpu/mes12: add mes mapping legacy queue support 
Add mes12 map legacy queue packet submission.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jack Xiao
6ce03bd3a4 drm/amdgpu/mes12: enable uni_mes fw on mes pipe0 
Enable the unified mes firmware on mes pipe0.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jack Xiao
d2e2c9be78 drm/amdgpu/mes12: add uni_mes fw loading support 
Add the unified mes firmware loading support.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jack Xiao
15ddc4e693 drm/amdgpu/mes: add uni_mes fw loading support 
Add the unified mes firmware loading support.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Sreekant Somasekharan
628e1ace23 drm/amdkfd: mark GFX12 system and peer GPU memory mappings as MTYPE_NC 
Due to a HW bug, the system memory mappings and peer GPU mappings
on GFX12 need to be marked as MTYPE_NC.

Cc: Joe Greathouse <joseph.greathouse@amd.com>
Cc: David Belanger <david.belanger@amd.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jonathan Kim
984b265ff6 drm/amdkfd: fix support for trap on wave start and end for gfx12 
Similar to GFX11, GFX12 supports trapping on wave start and end.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jonathan Kim
fda3f378c4 drm/amdkfd: always enable ttmp setup for gfx12 
Similar to GFX11, always enable the setup of trap temporaries on GFX12.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
David Belanger
90e4fc8369 drm/amdkfd: Added gfx_v12_kfd2kgd interface for GFX12. 
Initial implementation, based on GFX11.

v2: Removed functions not needed by cp scheduler.
v3: Fixed typos.
v4: squash in warning fix (Alex)

Signed-off-by: David Belanger <david.belanger@amd.com>
Acked-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
shaoyunl
2f983d3ca5 drm/amdgpu: Enable event log on MES 12 
Enable event log through the HW specific FW API

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
shaoyunl
19e69a5d28 drm/amdgpu: Enable unmapped doorbell handling basic mode on mes 12 
Enable basic mode handling for doorbell ring on unmapped CP queue.
In this mode, MES can start schedule the queue mapping based on HW
interrupt instead of timer.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
Hawking Zhang
a2211e475c drm/amdgpu: Switch to smuio func to get gpu clk counter 
Switch to smuio callback to query gpu clock counter

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
Likun Gao
e781af6663 drm/amdgpu: init gfxhub setting to align with mmhub 
Align gfxhub settings with mmhub when program rlc ram.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00