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20 Commits

Author SHA1 Message Date
Alexandre Demers
d35a412910 drm/amdgpu: keep removing sid.h dependency from si_dma.c 
Move and rename DMA_SEM_INCOMPLETE_TIMER_CNTL and DMA_SEM_WAIT_FAIL_TIMER_CNTL
in oss_1_0_d.h

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-04-07 15:18:33 -04:00
Alexandre Demers
0ba7e47e8e drm/amdgpu: add missing DMA defines, shifts and masks 
They will be used later when switching away from sid.h/si_enums.h.

v2: fix up whitespace (Alex)

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-04-07 15:18:33 -04:00
Sunil Khatri
cba9b630f0 drm/amdgpu: add IH_RING1_CFG headers for IH v6.0 
Add offsets, mask and shift macros for IH v6.0
which are needed to configure ring1 client irq
redirection.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-18 23:46:31 -04:00
Hawking Zhang
33c0c80ae5 drm/amdgpu: Add osssys v7_0_0 ip headers (v4) 
v1: Add osssys v7_0_0 register offset and shift masks
    header files. (Hawking)
v2: Update osssys v7_0_0 register offset and shift masks
    header files to RE2. (Likun)
v3: Update osssys v7_0_0 register offset and shift masks
    header files to RE2.5. (Likun)
v4: Clean up osssys v7_0_0 ip headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-12 16:09:06 -05:00
Ben Li
85c391abd2 drm/amdgpu: add ih 6.1 registers 
Add new registers.

v2: updates (Alex)

Signed-off-by: Ben Li <ben.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-07 16:35:31 -04:00
Mukul Joshi
318e431b30 drm/amdgpu: Enable IH retry CAM on GFX9 
This patch enables the IH retry CAM on GFX9 series cards. This
retry filter is used to prevent sending lots of retry interrupts
in a short span of time and overflowing the IH ring buffer. This
will also help reduce CPU interrupt workload.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-04-13 00:14:08 -04:00
Hawking Zhang
40a9634b4f drm/amdgpu: add osssys v4_4_2 ip headers 
Add osssys v4_4_2 register offset and shift masks
header files

v2: update headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-03-31 11:18:43 -04:00
Hawking Zhang
d71093aa15 drm/amdgpu: add osssys v6_0_0 ip headers v4 
Add osssys v6_0_0 register offset and shift masks
header files (Hawking)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-05-04 09:52:56 -04:00
Hawking Zhang
502173ac23 drm/amdgpu: add osssys v4_2 ip headers (v2) 
v1: add osssys v4_2 register offset and shift masks
header files. vega20 and arcturus will refer to
these ip headers. (Hawking)
v2: clean up osssys v4_2 registers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
 2020-12-23 15:05:20 -05:00
Kenneth Feng
227f7d58d7 drm/amd/amdgpu: add IH cg support on soc15 project 
enable/disable IH clock gating on soc15 projects.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-10-03 09:11:04 -05:00
Aaron Liu
7596625588 drm/amdgpu: update IH_CHICKEN in oss 4.0 IP header for VG/RV series 
In Renoir's emulator, those chicken bits need to be programmed.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-08-30 15:37:17 -05:00
Hawking Zhang
3d220cc3bd drm/amdgpu: add OSS 5.0 register headers 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-06-20 15:54:42 -05:00
Feifei Xu
133f97945f drm/amd/include: Add ip header files for vega12. 
Add ip header files for IPs with a delta for vg12:
GC, MMHUB, OSS

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-By: Ken Wang <ken.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-03-21 14:23:01 -05:00
Feifei Xu
8af7454e7c drm/amd/include:cleanup vega10 osssys header files. 
Cleanup asic_reg/vega10/OSSSYS folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:22 -05:00
Tom St Denis
5e2e211995 drm/amd/amdgpu: add SI defines/registers 
Add missing gca MMIO registers and defines necessary for the
next patch which re-works a lot of gfx v6 to use the new SI
headers.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-11-11 10:21:08 -05:00
Tom St Denis
de2bdb3dcf drm/amd/amdgpu: Introduction of SI registers (v2) 
This introduces the SI registers in the amdgpu
driver style.

v2: squash duplicates fix

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-11-11 10:21:07 -05:00
Alex Deucher
a1ef4a8aa1 drm/amdgpu: add OSS 3.0.1 register headers 
These are register headers for the OSS (OS Services)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:02 -04:00
Alex Deucher
6d5506b617 drm/amdgpu: add OSS 3.0 register headers 
These are register headers for the OSS (OS Services)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:01 -04:00
Alex Deucher
3f2ec6f51d drm/amdgpu: add OSS 2.4 register headers 
These are register headers for the OSS (OS Services)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:00 -04:00
Alex Deucher
599bd21552 drm/amdgpu: add OSS 2.0 register headers 
These are register headers for the OSS (OS Services)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:00 -04:00