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240 Commits

Author SHA1 Message Date
Vinod Govindapillai
d66f470f4d drm/i915/display: implement wa_14022269668 
As per the WA, fbc stride need to be programmed always for bmg.
Display driver handles the need to program the fbc stride using
the override stride. So ensure that we always get the override
stride in case of bmg

v2: re-phrase the commit message.

Bspec: 74212
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Link: https://lore.kernel.org/r/20250428115554.116780-1-vinod.govindapillai@intel.com
 2025-05-05 12:26:31 +03:00
Vinod Govindapillai
010363c461 drm/i915/display: implement wa_18038517565 
Disable FBC compressor clock gating before enabling FBC and
clear it after disabling FBC.

v2: update the DG2 registers for this wa

v3: use local variable and single line reg definition (Jani)

Bspec: 74212, 72197, 69741, 65555
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250330172616.718188-1-vinod.govindapillai@intel.com
 2025-03-31 14:36:50 +03:00
Jani Nikula
94fe5f275a drm/i915/wa: convert intel_display_wa.[ch] to struct intel_display 
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of intel_display_wa.[ch] to struct
intel_display.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/821937f9fcdcb7d5516be0c48c2cee009936ecb8.1742906146.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-03-28 13:52:23 +02:00
Vinod Govindapillai
11938353bf drm/i915/fbc: update the panel_replay dependency in fbc wa's 
There are two panel_replay scenarios fbc wa need to be aware of,
panel replay with and without selective update capability.
Panel replay without selective update don't have any fbc wa.
So keep the fbc psr1 wa as it is.

The current fbc psr2 wa is mainly about selective fetch and we
need to apply the fbc wa if selective fetch is on - irrespective
of panel replay. Hence we can't exclude panel replay from the
fbc psr2 wa.

v1: keep panel_replay exclusion in PSR1 case (Jouni)
    Patch description updated

Bspec: 66624, 50442
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250321094529.197397-3-vinod.govindapillai@intel.com
 2025-03-24 14:55:45 +02:00
Vinod Govindapillai
ccdb96cc71 drm/i915/fbc: keep FBC disabled if selective update is on in xe2lpd 
FBC was disabled in case PSR2 selective update in display 12 to
14 as part of a wa. From xe2lpd onwards there is a logic to be
implemented to decide between FBC and selective update. Until
that logic is implemented keep FBC disabled in case selective
update is enabled.

v1: updated patch description and some explanation and todo

Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250321094529.197397-2-vinod.govindapillai@intel.com
 2025-03-24 14:55:44 +02:00
Jani Nikula
4d3408328a drm/i915/display: convert to display runtime PM interfaces 
Convert i915 runtime PM interfaces to display runtime PM interfaces all
over the place in display code.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/494d0bd0348e4aa99560f1aed21aaaff31706c44.1742483007.git.jani.nikula@intel.com
 2025-03-21 10:20:05 +02:00
Vinod Govindapillai
af23476af8 drm/i915/fbc: handle dirty rect coords for the first frame 
During enabling FBC, for the very first frame, the prepare dirty
rect routine wouldnt have executed as at that time the plane
reference in the fbc_state would be NULL. So this could make
driver program some invalid entries as the damage area. Though
fbc hw ignores the dirty rect values programmed for the first
frame after enabling FBC, driver must ensure that valid dirty
rect coords are programmed. So ensure that for the first frame
correct dirty rect coords are updated to the HW.

Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250228093802.27091-10-vinod.govindapillai@intel.com
 2025-03-03 14:45:45 +02:00
Vinod Govindapillai
e2364a56ad drm/i915/fbc: disable FBC if PSR2 selective fetch is enabled 
It is not recommended to have both FBC dirty rect and PSR2
selective fetch be enabled at the same time. Mark FBC as not
possible, if PSR2 selective fetch is enabled.

v2: fix the condition to disable FBC if PSR2 enabled (Jani)

v3: use HAS_FBC_DIRTY_RECT()

v4: Update to patch description

Bspec: 68881
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250228093802.27091-9-vinod.govindapillai@intel.com
 2025-03-03 14:45:45 +02:00
Vinod Govindapillai
194ecad0b5 drm/i915/fbc: dirty rect support for FBC 
Dirty rectangle feature allows FBC to recompress a subsection
of a frame. When this feature is enabled, display will read
the scan lines between dirty rectangle start line and dirty
rectangle end line in subsequent frames.

Use the merged damage clip stored in the plane state to
configure the FBC dirty rect areas.

v2: - Move dirty rect handling to fbc state (Ville)

v3: - Use intel_fbc_dirty_rect_update_noarm (Ville)
    - Split plane damage collection and dirty rect preparation
    - Handle case where dirty rect fall outside the visible region

v4: - A state variable to check if we need to update dirty rect
    registers in case intel_fbc_can_flip_nuke() (Ville)

v5: - No need to use a separate valid flag, updates to the
      conditions for prepare damage rect (Ville)
    - Usage of locks in fbc dirty rect related functions (Ville)

v6: - updates dirty rect handling (Ville)

v7: - Loop through all planes in atomic state is good enough (Ville)

Bspec: 68881, 71675, 73424
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250228093802.27091-8-vinod.govindapillai@intel.com
 2025-03-03 14:45:44 +02:00
Vinod Govindapillai
5adac4c9f3 drm/i915/fbc: avoid calling fbc activate if fbc is active 
If FBC is already active, we don't need to call FBC activate
routine again unless there are changes to the fences. So skip
this on all platforms that don't have fences. Any FBC register
updates done after enabling the dirty rect support in xe3 will
trigger nuke by FBC which is counter productive to the fbc
dirty rect feature.

The front buffer rendering sequence will call intel_fbc_flush()
and which will call intel_fbc_nuke() or intel_fbc_activate()
based on FBC status explicitly and won't get impacted by this
change.

v2: use HAS_FBC_DIRTY_RECT()
    move this functionality within intel_fbc_activate()

v3: update to intel_fbc_activate logic (Ville)
    update to the patch description

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250228093802.27091-7-vinod.govindapillai@intel.com
 2025-03-03 14:45:43 +02:00
Jani Nikula
ecddc26b4c drm/i915/fbc: convert intel_fbc.[ch] to struct intel_display 
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of intel_fbc.[ch] to struct
intel_display. In a few places, change the variable declaration order to
prefer having display first.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/4dfd7d62e99b75d26563bdf29f541ed2ffbe548e.1740502116.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-02-27 12:28:03 +02:00
Jani Nikula
5eb2e78559 drm/i915/display: use x100 version for full version and release 
Use x100, or ver * 100 + rel, versions for full IP version checks,
similar to what xe driver does:

- Replace IP_VER(14, 1) inline with 1401, etc.

- Convert DISPLAY_VER_FULL() to DISPLAY_VERx100()

- Convert IS_DISPLAY_VER_FULL() to IS_DISPLAY_VERx100()

- Convert IS_DISPLAY_VER_STEP() to IS_DISPLAY_VERx100_STEP()

This makes ver.rel versions easier to use, follows the xe driver
pattern, and drops the dependency on the IP_VER() macro.

v2: Rebase, drop IP_VER() from xe compat headers

v3: Rebase

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241029155536.753413-1-jani.nikula@intel.com
 2024-10-30 14:19:07 +02:00
Jani Nikula
138d2bda4e drm/i915/display: pass display to intel_crtc_for_pipe() 
Convert the intel_crtc_for_pipe() struct drm_i915_private parameter to
struct intel_display.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240904130633.3831492-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-09-05 21:05:42 +03:00
Jani Nikula
ae19ba915e drm/i915/display: include media/cec-notifier.h and linux/debugfs.h where needed 
Use a forward declaration for struct cec_notifier instead of including
media/cec-notifier.h in intel_display_types.h, and only include it where
needed.

Also realize that a lot of places depend on including linux/debugfs.h
via intel_display_types.h -> media/cec-notifier.h -> media/cec.h, and
include that too where needed.

v2: hsw_ips.c also needs debugfs.h (kernel test robot)

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240827104521.4151471-1-jani.nikula@intel.com
 2024-09-05 12:21:22 +03:00
Rodrigo Vivi
04cf420bbc Merge drm/drm-next into drm-intel-next 
Need to take some Xe bo definition in here before
we can add the BMG display 64k aligned size restrictions.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-08-27 17:06:28 -04:00
Jani Nikula
5a48d67ac3 drm/i915/display: rename IS_DISPLAY_IP_STEP() to IS_DISPLAY_VER_STEP() 
Unify macro naming on VER.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6861e02f3adf15d56e89890000eb195070c33c9b.1724180287.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-08-22 15:48:03 +03:00
Dave Airlie
a809b92ee0 Merge tag 'drm-intel-next-2024-08-13' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next 
- Type-C programming fix for MTL+ (Gustavo)
 - Fix display clock workaround (Mitul)
 - Fix DP LTTPR detection (Imre)
 - Calculate vblank delay more accurately (Ville)
 - Make vrr_{enabling,disabling}() usable outside intel_display.c (Ville)
 - FBC clean-up (Ville)
 - DP link-training fixes and clean-up (Imre)
 - Make I2C terminology more inclusive (Easwar)
 - Make read-only array bw_gbps static const (Colin)
 - HDCP fixes and improvements (Suraj)
 - DP VSC SDP fixes and clean-ups (Suraj, Mitul)
 - Fix opregion leak in Xe code (Lucas)
 - Fix possible int overflow in skl_ddi_calculate_wrpll (Nikita)]
 - General display clean-ups and conversion towards intel_display (Jani)
 - On DP MST, Enable LT fallback for UHBR<->non-UHBR rates (Imre)
 - Add VRR condition for DPKGC Enablement (Suraj)
 - Use backlight power constants (Zimmermann)
 - Correct dual pps handling for MTL_PCH+ (Dnyaneshwar)
 - Dump DSC HW state (Imre)
 - Replace double blank with single blank after comma (Andi)
 - Read display register timeout on BMG (Mitul)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZruWsyTv3nzdArDk@intel.com
 2024-08-16 12:56:42 +10:00
Ville Syrjälä
d43caea1fa drm/i915/fbc: Extract intel_fbc_cfb_cpp() 
Extract a helper to determine the CFB bytes per pixel value.
Currently this is always 4, but that could change in the
future.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-14-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
 2024-07-12 15:16:33 +03:00
Ville Syrjälä
4d72202993 drm/i915/fbc: Extract _intel_fbc_cfb_size() 
Pull the lower level stuff out from intel_fbc_cfb_size() into
a separate function that doesn't depend on the plane_state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-13-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
 2024-07-12 15:16:33 +03:00
Ville Syrjälä
f89d7664c3 drm/i915/fbc: Extract intel_fbc_max_cfb_height() 
Pull the code to determine the maximum CFB height
into a separate function.

To make this work we need to declare an explicit max height
for all older platforms as well. But that is actually just
the max plane height as pre-HSW hardware supposedly doesn't
have the trick of leaving the extra lines uncompressed.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-12-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
 2024-07-12 15:13:15 +03:00
Ville Syrjälä
4290eaa842 drm/i915/fbc: Reoder CFB max height platform checks 
Rearrange the max CFB max height platform into the
more common "new first, old last" order.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-11-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-07-12 15:05:40 +03:00
Ville Syrjälä
566ad72ba6 drm/i915/fbc: s/lines/height/ 
Use the more customary name 'height' instead of 'lines'.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-10-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-07-12 15:05:40 +03:00
Ville Syrjälä
6a1738b3fd drm/i915/fbc: Extract _intel_fbc_cfb_stride() 
Pull the lower level stuff out from intel_fbc_cfb_stride() into
a separate function that doesn't depend on the plane_state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-9-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
 2024-07-12 15:05:40 +03:00
Ville Syrjälä
9490000038 drm/i915/fbc: Adjust g4x+ platform checks 
Do the "is this ilk+ or g4x" checks in the customary order instead
of the reverse order. Easier for the poor brain to parse this
when it's always done the same way.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-8-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-07-12 15:05:40 +03:00
Ville Syrjälä
4c46e34e67 drm/i915/fbc: s/intel_fbc_hw_tracking_covers_screen()/intel_fbc_surface_size_ok()/ 
Rename intel_fbc_hw_tracking_covers_screen() to intel_fbc_surface_size_ok()
so that the naming scheme is the same for the surface size vs. plane
size checks. "surface size" is what bspec talks about.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-7-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-07-12 15:05:40 +03:00
Ville Syrjälä
da9bbdb974 drm/i915/fbc: Extract intel_fbc_max_surface_size() 
Extract intel_fbc_max_surface_size() from
intel_fbc_hw_tracking_covers_screen(), mainly to mirror the
"max plane size" counterparts.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-6-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-07-12 15:05:40 +03:00
Ville Syrjälä
a5beee6524 drm/i915/fbc: Extract intel_fbc_max_plane_size() 
Extract intel_fbc_max_plane_size() from intel_fbc_plane_size_valid().
We'll have another use for this soon in determining how much stolen
memory we'd like to keep reserved for FBC.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-5-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-07-12 15:05:40 +03:00
Ville Syrjälä
6c9ee258b1 drm/i915/fbc: s/_intel_fbc_cfb_stride()/intel_fbc_plane_cfb_stride()/ 
_intel_fbc_cfb_stride() calculates the CFB stride the hardware would
automagically generate from the plane's stride. Rename the function
to intel_fbc_plane_cfb_stride() to better reflect its purpose.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-4-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-07-12 15:05:40 +03:00
Ville Syrjälä
fd5a9b950e drm/i915/fbc: Convert to intel_display, mostly 
Switch the FBC code over to intel_display from i915, as
much as possible. This is the future direction so that
the display code can be shared between i915 and xe more
cleanly.

Some of the platform checks and the stolen mem facing stiff
still need i915 around though.

v2: Drop some redundant to_i915() casts

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-3-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-07-12 15:05:23 +03:00
Ville Syrjälä
bc34d310b5 drm/i915/fbc: Extract intel_fbc_has_fences() 
Pull the "do we have fences?" check into a single helper in the FBC
code. Avoids having to call to outside the display code in multiple
places for this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-2-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-07-12 14:37:12 +03:00
Matthew Auld
c55f79f317 drm/i915: disable fbc due to Wa_16023588340 
On BMG-G21 we need to disable fbc due to complications around the WA.

v2:
 - Try to handle with i915_drv.h and compat layer. (Rodrigo)
v3:
 - For simplicity retreat back to the original design for now.
 - Drop the extra \ from the Makefile (Jani)

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Vinod Govindapillai <vinod.govindapillai@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240703124338.208220-4-matthew.auld@intel.com
 2024-07-05 09:53:14 +01:00
Vinod Govindapillai
355d210aad drm/i915/display: update handling of FBC when VT-d active workaround 
Move the handling of the disabling FBC when VT-d is active wa
as part of the intel_fbc_check_plane(). As the hw is still there,
intel_fbc_sanitize should be able to handle the state properly.

v2: update the patch description (Jani Nikula)

v3: fix the return value in wa handling (Jani Nikula)

Bspec: 21664
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240528114826.134958-1-vinod.govindapillai@intel.com
 2024-06-17 13:01:57 +03:00
Jani Nikula
03f8db65ad drm/i915/display: include gt/intel_gt_types.h where needed 
Include what you use. We need to move the compat intel_gt_types.h under
gt subdir. With this, we can drop the include from xe compat i915_drv.h.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/df73c0934ad21f157714a41b33b81cebd2a523a6.1717004739.git.jani.nikula@intel.com
 2024-06-06 15:59:29 +03:00
Jani Nikula
27e3b4ee63 drm/i915/display: include gem/i915_gem_stolen.h where needed 
Include what you use. We need to move the compat i915_gem_stolen.h under
gem subdir. With this, we can drop the include from xe compat
i915_drv.h.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6ac3480a8689fda5aaf4007cb604e06e939a03f7.1717004739.git.jani.nikula@intel.com
 2024-06-06 15:59:08 +03:00
Jani Nikula
9e93147f12 drm/i915: pass dev_priv explicitly to DSPSURF 
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPSURF register macro.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/fc2d7753aa6e8e25303a111bf4b120da6ce8c458.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-05-24 10:40:56 +03:00
Jani Nikula
c09b5ddb6e drm/i915: pass dev_priv explicitly to DSPADDR 
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPADDR register macro.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/777d4189c18c16392015dd2770f5c56d94bb88a9.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-05-24 10:40:37 +03:00
Ville Syrjälä
514ca6dffb drm/i915: Extract i9xx_plane_regs.h 
Relocate all pre-skl primary plane register definitions
into their own declutter i915_reg.h.

Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.wang.linux@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-10-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2024-05-22 15:54:53 +03:00
Jouni Högander
54599011b7 drm/i915/psr: Do not apply workarounds in case of panel replay 
There are some workarounds that are not applicable for panel replay. Do not
apply these if panel replay is used.

Bspec: 66624, 50422

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510093823.3146455-10-jouni.hogander@intel.com
 2024-05-15 10:56:28 +03:00
Jouni Högander
1e52db8a43 drm/i915/psr: Rename has_psr2 as has_sel_update 
We are going to reuse has_psr2 for panel_replay as well. Rename it
as has_sel_update to avoid confusion.

v3: do not add has_psr check into psr2 case in intel_dp_compute_vsc_sdp
v2: Rebase

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510093823.3146455-2-jouni.hogander@intel.com
 2024-05-15 10:54:51 +03:00
Jani Nikula
4973e63240 drm/i915/display: split out intel_fbc_regs.h from i915_reg.h 
Clean up i915_reg.h.

v2: Drop chicken regs and comments (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/aa9b5d8adefbe97e1e37c9cfada3ab1581b0e8d5.1714128645.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-04-29 12:30:01 +03:00
Ville Syrjälä
f26b6af51d drm/i915/fbc: Move DPFC_CHICKEN programming into intel_fbc_program_workarounds() 
Move all DPFC_CHICKEN programming into intel_fbc_program_workarounds().
We already have one thing programmed there, whereas the rest is strewn
about in intel_display_wa_apply() and init_clock_gating(). Since we have
a single place doing all the programming (and it's serialized by the
crtc commits) there should be no danger of rmw races.

Other FBC related workarounds also exist, but those require fiddling
with other registers that may also get programmed from other places,
so we'll need to think harder what to do with those.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240123090051.29818-2-ville.syrjala@linux.intel.com
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
 2024-03-07 20:59:01 +02:00
Ville Syrjälä
35396cd3ef drm/i915/fbc: Allow FBC with CCS modifiers on SKL+ 
Only display workarounds 0391 and 0475 call for disabling
FBC with render compression, and those are listed only for
pre-prod SKL steppings. So it should be safe to enable
FB+CCS on production hardware.

AFAIK CCS is limited to 50% bandwidth reduction (perhaps
clear color can do better?). FBC can exceed that number
by quite a bit, given the right kind of framebuffer
contents. So piling on both kinds of compressions could
still make sense.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10125
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240123090244.30025-1-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2024-02-02 23:56:52 +02:00
Vinod Govindapillai
b844c6bae2 drm/i915/xe2lpd: remove the FBC restriction if PSR2 is enabled 
In earlier versions, FBC was restricted if PSR2 is enabled. From
xe2lpd onwards no such restrictions are needed anymore.

HSD: 14014305387
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231110093225.39573-2-vinod.govindapillai@intel.com
 2023-11-29 11:49:08 +02:00
Ville Syrjälä
f1dfb517cc drm/i915/fbc: Bump ivb FBC max surface size to 4kx4k 
IVB Bspec says:
"Frame Buffer Compression is only supported with memory surfaces of 4096 lines
or less and pipe source sizes of 4096 pixels by 2048 lines or less. "

so seems like we should be able to bump the offset+size limit to
at least 4kx4k. Make it so.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231117171833.25816-3-ville.syrjala@linux.intel.com
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
 2023-11-20 15:55:10 +02:00
Ville Syrjälä
5c38280cb7 drm/i915/fbc: Bump max surface size to 8kx4k on icl+ 
FBC on icl+ should supposedly be fine with surface sizes up to
8kx4k. Bump up the limit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231117171833.25816-2-ville.syrjala@linux.intel.com
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
 2023-11-20 15:54:56 +02:00
Ville Syrjälä
7521c8a657 drm/i915/fbc: Split plane size vs. surface size checks apart 
Do separate checks for the visible plane size vs. the surface
size (which I take to mean offset+size). For now both use the
same max w/h, but we can relax the surface size limits as
a followup.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231117171833.25816-1-ville.syrjala@linux.intel.com
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
 2023-11-20 15:52:45 +02:00
Vinod Govindapillai
8a4353d077 drm/i915/xe2lpd: implement WA for underruns while enabling FBC 
FIFO underruns are observed when FBC is enabled on plane 2 or
plane 3. Recommended WA is to update the FBC enabling sequence.
The plane binding register bits need to be updated separately
before programming the FBC enable bit.

Bspec: 74151
Reviewed-by: Mika Kahola <mika.kahola@intel.com> #v3
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231111114320.87277-2-vinod.govindapillai@intel.com
 2023-11-15 09:40:18 +02:00
Jouni Högander
6f4f8aef7e drm/i915/display: Move enable_fbc module parameter under display 
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231024124109.384973-4-jouni.hogander@intel.com
 2023-10-26 12:13:50 +03:00
Ville Syrjälä
64909aa6dd drm/i915/fbc: Remove pointless "stride is multiple of 64 bytes" check 
Plane stride is always a multiple of 64 bytes. Remove the
pointless check that really doesn't have anything to do
with FBC.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003194256.28569-6-ville.syrjala@linux.intel.com
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
 2023-10-05 13:25:36 +03:00
Ville Syrjälä
1fe5c43e44 drm/i915/fbc: Split plane pixel format checks per-platform 
Carve up pixel_format_is_valid() into per-platform variants to
make it easier to see what limits are actually being imposed.

Note that the XRGB1555 can be dropped from the g4x+ variant
since the plane no longer supports that format anyway.

TODO: maybe go for vfuncs later

v2: Update for lnl changes

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> #v1
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231003194256.28569-5-ville.syrjala@linux.intel.com
 2023-10-05 13:25:36 +03:00