3 Commits

Author	SHA1	Message	Date
Alex Deucher	a125510721	drm/amdgpu: rework IP block registration (v2) ... This makes it easier to replace specific IP blocks on asics for handling virtual_dce, DAL, etc. and for building IP lists for hw or tables. This also stored the status information in the same structure. v2: split out spelling fix into a separate patch add a function to add IPs to the list Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2016-10-25 14:38:45 -04:00
Tom St Denis	6e9057a8f9	drm/amd/amdgpu: Tidy up SI IH code ... Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2016-09-12 18:12:22 -04:00
Ken Wang	27ae10641e	drm/amdgpu: add interupt handler implementation for si v3 ... v3: rebase fixups Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2016-08-31 12:10:19 -04:00