Mario Limonciello
350ae9ec3f
Documentation/gpu: Add Raphael to apu-asic-info-table
...
Raphael launched in 2022 but was missed to add to this table.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2023-01-19 17:24:25 -05:00
Mario Limonciello
7b785c47c9
Documentation/gpu: Add Mendocino to apu-asic-info-table
...
Mendocino launched in 2023 and uses the new naming scheme for APU
processors.
Link: https://community.amd.com/t5/corporate/announcing-new-model-numbers-for-2023-mobile-processors/ba-p/543985
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2023-01-19 17:24:25 -05:00
Mario Limonciello
e0d06733c7
Documentation/gpu: Update lines for GREEN_SARDINE and YELLOW_CARP
...
These products have launched, so add matching codenames.
Also AMD has announced that both of these products have new refresh
variants that launch in 2023 using the new naming scheme, so add
that information.
Link: https://community.amd.com/t5/corporate/announcing-new-model-numbers-for-2023-mobile-processors/ba-p/543985
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2023-01-19 17:24:25 -05:00
Mario Limonciello
7bdcc67cf2
Documentation/gpu: Add MP0 version to apu-asic-info-table
...
MP0 version is useful to know to figure out which firmware is intended
for a platform. Add a column for all supported APUs.
v2: squash in column fix (Mario)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2023-01-19 17:24:25 -05:00
Rodrigo Siqueira
9d9b217d52
Documentation/gpu: Add info table for ASICs
...
Amdgpu driver is used in an extensive range of devices, and each ASIC
has some specific configuration. As a result of this variety, sometimes
it is hard to identify the correct block that might cause the issue.
This commit expands the amdgpu kernel-doc to alleviate this issue by
introducing one ASIC table that describes dGPU and another one that
shares the APU info.
Cc: Harry Wentland <harry.wentland@amd.com >
Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com >
Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com >
Cc: Hersen Wu <hersenxs.wu@amd.com >
Cc: Alex Hung <alex.hung@amd.com >
Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Cc: Leo Li <sunpeng.li@amd.com >
Cc: Simon Ser <contact@emersion.fr >
Cc: Pekka Paalanen <pekka.paalanen@collabora.com >
Cc: Sean Paul <seanpaul@chromium.org >
Cc: Mark Yacoub <markyacoub@chromium.org >
Cc: Pierre-Loup <pgriffais@valvesoftware.com >
Cc: Michel Dänzer <michel.daenzer@mailbox.org >
Cc: Kent Russell <Kent.Russell@amd.com >
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2022-09-01 15:09:31 -04:00
