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13 Commits

Author SHA1 Message Date
James Zhu
7ab3f021bb drm/amdgpu:Improves robustness of SOC15_WAIT_ON_RREG 
If register value is updating, reset timeout counter.
It improves robustness of SOC15_WAIT_ON_RREG.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-12-18 17:39:03 -05:00
Alex Deucher
81bb773f35 drm/amdgpu/soc15: fix warnings in register macro 
expects argument of type ‘unsigned int’ has type ‘long int’

Fixes: 52e211c1f0 ("drm/amdgpu:Add error message when register failed to reach expected value")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-09-26 21:09:26 -05:00
James Zhu
03d6e3aac8 drm/amdgpu:Add DPG mode read/write macro 
Some registers read/write needs program through SDRAM pool under
DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-09-26 21:09:24 -05:00
James Zhu
52e211c1f0 drm/amdgpu:Add error message when register failed to reach expected value 
Add error message when register failed to reach expected value, It will
help discover potential issue.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-09-13 15:14:08 -05:00
Rex Zhu
ac06b4cfd7 drm/amdgpu: Add SOC15_WAIT_ON_RREG macro define 
Add new macro to wait on a register field to be a specific
value.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-05-24 00:18:02 -05:00
Alex Deucher
bf383fb64e drm/amdgpu: convert nbio to use callbacks (v2) 
Cleans up and consolidates all of the per-asic logic.

v2: squash in "drm/amdgpu: fix NULL err for sriov detect" (Chunming)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-13 17:28:07 -05:00
Shaoyun Liu
cd29253f65 drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset 
Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:32:24 -05:00
Shaoyun Liu
946a4d5b30 drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array 
Handle dynamic offsets correctly in static arrays.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:18:51 -05:00
Shaoyun Liu
b466107e8b drm/amdgpu: Use dynamic IP offset for register access on SOC15 
Update the register access macros and functions to take into
account the new dynamic IP base offsets.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-08 11:17:56 -05:00
Shaoyun Liu
c708535e9c drm/amdgpu: Add WREG32_SOC15_NO_KIQ macro define 
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-07-14 11:06:10 -04:00
Tom St Denis
496828e786 drm/amd/amdgpu: Add offset variant to SOC15 macros 
Allows reading/writing via SOC15 macros with offset for
various register banks.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2017-06-15 11:50:30 -04:00
Tom St Denis
b1bb8c0118 drm/amd/amdgpu: Introduce new read/write macros for SOC15 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 16:37:59 -04:00
Ken Wang
8e3153ba3f drm/amdgpu: add common soc15 headers 
These are used by various IP modules.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:54:31 -04:00