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32 Commits

Author SHA1 Message Date
Alex Deucher
57e5682661 drm/amdgpu/sdma: fix mask in emit_pipeline_sync 
commit 4a8e06f7aa upstream.

Needs to be a 32 bit mask.

Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2018-04-24 09:36:35 +02:00
Hawking Zhang
b416bf14bd drm/amdgpu: ignore digest_size when loading sdma fw for raven 
digest_size has been retired from sdma v4 fw

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:46:20 -04:00
Alex Deucher
68c3c67fe6 drm/amdgpu/sdma4: move wptr polling setup 
Move it up before ring enablement with all of the other
engine setup and explicitly disable it for bare metal.

Cc: Frank Min <Frank.Min@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:46:04 -04:00
Alex Deucher
34c3a82b5a drm/amdgpu/sdma4: drop allocation of poll_mem_offs 
We already allocate this as part of the ring structure,
use that instead.

Cc: Frank Min <Frank.Min@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:46:04 -04:00
Alex Deucher
a67094432d drm/amdgpu/sdma4: drop hdp flush from wptr shadow update 
The wb buffer is in system memory, not vram so the flush
is useless.

Cc: Frank Min <Frank.Min@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:46:03 -04:00
Alex Deucher
575a07d2da drm/amdgpu/sdma4: set wptr shadow atomically (v2) 
No functional change until wptr polling uses this
location (future patch).

v2: use WRITE_ONCE

Cc: Frank Min <Frank.Min@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:46:02 -04:00
Alex Deucher
5060baa0e5 drm/amdgpu/sdma4: drop unused register header 
nbio registers are not used in this file.

Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: Frank Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:46:00 -04:00
Frank Min
51668b0b1b drm/amdgpu/sdma4: Enable sdma poll mem addr on vega10 for SRIOV 
While doing flr on VFs, there is possibility to lost the doorbell
writing for sdma, so enable poll mem for sdma, then sdma fw would
check the pollmem holding wptr.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-08-15 14:45:49 -04:00
Felix Kuehling
a667386cb9 drm/amdgpu: Make SDMA phase quantum configurable 
Set a configurable SDMA phase quantum when enabling SDMA context
switching. The default value significantly reduces SDMA latency
in page table updates when user-mode SDMA queues have concurrent
activity, compared to the initial HW setting.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Andres Rodriguez <andres.rodriguez@amd.com>
Reviewed-by: Shaoyun Liu <shaoyun.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-07-14 11:06:36 -04:00
Christian König
b116632557 drm/amdgpu: cleanup adjust_mc_addr handling v4 
Rename adjust_mc_addr to get_vm_pde and check the address bits in one place.

v2: handle vcn as well, keep setting the valid bit manually,
    add a BUG_ON() for GMC v6, v7 and v8 as well.
v3: handle vcn_v1_0_enc_ring_emit_vm_flush as well.
v4: fix the BUG_ON mask for GFX6-8

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-31 14:16:35 -04:00
Hawking Zhang
1d30b9906f drm/amdgpu: update sdma 4.1 raven specific golden settings 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-31 14:16:34 -04:00
Hawking Zhang
1974a2a28b drm/amdgpu: remove unnecessary debug message 
remnants from bring-up.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-31 14:16:32 -04:00
Christian König
9a94f5a593 drm/amdgpu: move adjust adjust_mc_addr into the GFX9 vm_flush functions 
That GFX9 needs a PDE in the registers is entirely GFX9 specific.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 18:19:49 -04:00
Chunming Zhou
aecbe64f2b drm/amdgpu: apply nbio7 for Raven (v3) 
nbio handles misc bus io operations. Handle
differences between different nbio bus versions.

v2: switch checks from RAVEN to APU (Alex)
    squash in raven rev id fetch
    squash in fix uninitalized hdp flush reg index for raven
v3: add some missed RAVEN to APU checks (Alex)

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:17 -04:00
Huang Rui
13cfe5d076 drm/amdgpu/sdma4: add dynamic power gating for raven 
Add the functions to enable dynamic powergating.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:15 -04:00
Huang Rui
db3144029c drm/amdgpu: init sdma power gating for raven 
Initialize sdma for powergating.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:14 -04:00
Huang Rui
93e2b09357 drm/amdgpu: reuse sdma v4 MGCG and LS function for raven 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:12 -04:00
Chunming Zhou
7271f068d1 drm/amdgpu: add Raven sdma golden setting and chip id case 
Add golden settings for SDMA.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:11 -04:00
Chunming Zhou
060d124b06 drm/amdgpu: add module firmware for raven 
Fetch correct firmware for raven for gfx and sdma.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:54 -04:00
Rex Zhu
4bdcc4ea3a drm/amd/amdgpu: coding style refine in sdma_v4_0.c 
Replace 8 spaces with tabs.
correct {} braces, etc.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 17:32:39 -04:00
Rex Zhu
79690b84db drm/amdgpu: Remove redundant itermediate return val in sdma_v4_0.c 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 17:32:38 -04:00
Huang Rui
b3124dfcce drm/amdgpu: fix to print incorrect wptr address 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 17:32:37 -04:00
Christian König
4789c463cb drm/amdgpu: assign VM invalidation engine manually v2 
For Vega10 we have 18 VM invalidation engines for each VMHUB.

Start to assign them manually to the rings.

v2: add a BUG_ON if we use to many engines

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 17:32:19 -04:00
Christian König
2e81984988 drm/amdgpu: invalidate only the currently needed VMHUB v2 
Drop invalidating both hubs from each engine.

v2: don't use hardcoded values

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 17:32:18 -04:00
Christian König
0eeb68b390 drm/amdgpu: add VMHUB to ring association 
Add the info which ring belonging to which VMHUB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-28 17:32:16 -04:00
Christian König
03f89feb57 drm/amdgpu: cleanup get_invalidate_req v2 
The two hubs are just instances of the same hardware,
so the register bits are identical.

v2: keep the function pointer

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-04-06 13:27:18 -04:00
Junwei Zhang
b9be700e38 drm/amdgpu: fix vm pte pde flags to 64-bit for sdma (v3) 
v2: fix for all sdma engines
v3: squash in fix for SI/CI

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:55:50 -04:00
Monk Liu
32833fb732 drm/amdgpu:two fixings for sdma v4 for SRIOV 
no hw_fini for SRIOV, otherwise other VF will be affected
no CG for SRIOV

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:55:39 -04:00
Monk Liu
ca82a746b0 drm/amdgpu:change sequence of SDMA v4 init 
must set minor_update.enable before write smaller value
to wptr/doorbell, so for sriov we need set that register
bit in hw_init period.

this could fix the SDMA ring test fail after guest reboot

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:55:39 -04:00
Huang Rui
2eba890cb8 drm/amdgpu: add get_clockgating for sdma v4 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:55:20 -04:00
Monk Liu
0e11de1ef5 drm/amdgpu/sdma4:re-org SDMA initial steps for sriov 
Rework sdma init to support SR-IOV.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:55:03 -04:00
Ken Wang
2130f89ced drm/amdgpu: add SDMA v4.0 implementation (v2) 
v2: fix Makefile

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:54:45 -04:00