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40 Commits

Author SHA1 Message Date
Alex Deucher
2b00b32e61 drm/amdgpu/mes12: optimize MES pipe FW version fetching 
commit 34779e1446 upstream.

Don't fetch it again if we already have it.  It seems the
registers don't reliably have the value at resume in some
cases.

Fixes: 785f0f9fe7 ("drm/amdgpu: Add mes v12_0 ip block support (v4)")
Reviewed-by: Shaoyun.liu <Shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 9e7b08d239)
Cc: stable@vger.kernel.org # 6.12.x
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2025-04-25 10:47:59 +02:00
Jack Xiao
79365ea707 drm/amdgpu/mes12: correct kiq unmap latency 
Correct kiq unmap queue timeout value.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit cfe98204a0)
Cc: stable@vger.kernel.org # 6.11.x
 2024-11-11 14:05:51 -05:00
Michael Chen
7760d7f93c drm/amdgpu/mes: fix issue of writing to the same log buffer from 2 MES pipes 
With Unified MES enabled in gfx12, need separate event log buffer for the
2 MES pipes to avoid data overwrite.

Signed-off-by: Michael Chen <michael.chen@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 144df260f3)
Cc: stable@vger.kernel.org # 6.11.x
 2024-10-15 11:48:36 -04:00
Jack Xiao
4771d2ecb7 drm/amdgpu/mes12: set enable_level_process_quantum_check 
enable_level_process_quantum_check is requried to enable process
quantum based scheduling.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.11.x
 2024-09-25 12:55:14 -04:00
Alex Deucher
84f76408ab drm/amdgpu/mes12: reduce timeout 
The firmware timeout is 2s.  Reduce the driver timeout to
2.1 seconds to avoid back pressure on queue submissions.

Fixes: 94b51a3d01 ("drm/amdgpu/mes12: increase mes submission timeout")
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.11.x
 2024-09-18 16:15:13 -04:00
Jack Xiao
3c75518cf2 drm/amdgpu/mes12: switch SET_SHADER_DEBUGGER pkt to mes schq pipe 
The SET_SHADER_DEBUGGER packet must work with the added
hardware queue, switch the packet submitting to mes schq pipe.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.11.x
 2024-09-18 16:14:27 -04:00
Jack Xiao
52491d97aa drm/amdgpu/mes: add mes mapping legacy queue switch 
For mes11 old firmware has issue to map legacy queue,
add a flag to switch mes to map legacy queue.

Fixes: f9d8c5c785 ("drm/amdgpu/gfx: enable mes to map legacy queue support")
Reported-by: Andrew Worsley <amworsley@gmail.com>
Link: https://lists.freedesktop.org/archives/amd-gfx/2024-August/112773.html
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-08-29 13:41:02 -04:00
Alex Deucher
32aada4d0a drm/amdgpu/mes12: add API for user queue reset 
Add API for resetting user queues.

Acked-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-08-16 14:25:09 -04:00
Jack Xiao
98cae695a8 drm/amdgpu/mes12: sw/hw fini for unified mes 
Free memory for two pipes and unmap pipe0 via pipe1.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-08-13 12:13:03 -04:00
Jack Xiao
ea5d6db17a drm/amdgpu/mes12: configure two pipes hardware resources 
Configure two pipes with different hardware resources.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-08-13 12:12:52 -04:00
Jack Xiao
aa539da8af drm/amdgpu/mes12: adjust mes12 sw/hw init for multiple pipes 
Adjust mes12 sw/hw initiailization for both pipe0 and pipe1
enablement. The two pipes are almost identical pipe. Pipe0
behaves like schq and pipe1 like kiq, pipe0 was mapped by pipe1.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-08-13 12:12:52 -04:00
Jack Xiao
b2dee0837a drm/amdgpu/mes12: add mes pipe switch support 
Add mes pipe switch to let caller choose pipe
to submit packet.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-08-13 12:12:52 -04:00
Jack Xiao
e69c2dd753 drm/amdgpu/mes12: load unified mes fw on pipe0 and pipe1 
Enable unified mes firmware to load on pipe0 and pipe1.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-08-13 12:12:52 -04:00
Jack Xiao
c7d4355648 drm/amdgpu/mes: add multiple mes ring instances support 
Add multiple mes ring instances in mes structure to support
multiple mes pipes.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-08-13 10:29:25 -04:00
Alex Deucher
947c080869 drm/amdgpu/mes12: add API for legacy queue reset 
Add API for resetting kernel queues.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-08-13 10:28:11 -04:00
Jack Xiao
34e087e892 drm/amdgpu/mes: fix mes ring buffer overflow 
wait memory room until enough before writing mes packets
to avoid ring buffer overflow.

v2: squash in sched_hw_submission fix

Fixes: de32462541 ("drm/amdgpu: cleanup MES11 command submission")
Fixes: fffe347e14 ("drm/amdgpu: cleanup MES12 command submission")
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-08-13 09:57:52 -04:00
Michael Chen
739d0f3e1f drm/amdgpu: increase mes log buffer size for gfx12 
MES firmware requires larger log buffer for gfx12. Allocate
proper buffer respectively for gfx11 and gfx12.

Signed-off-by: Michael Chen <michael.chen@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-27 17:32:05 -04:00
Alex Deucher
1cff1010be drm/amdgpu/mes12: add missing opcode string 
Fixes the indexing of the string array.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-07-12 11:46:46 -04:00
Alex Deucher
fffe347e14 drm/amdgpu: cleanup MES12 command submission 
The approach of having a separate WB slot for each submission doesn't
really work well and for example breaks GPU reset.

Use a status query packet for the fence update instead since those
should always succeed we can use the fence of the original packet to
signal the state of the operation.

While at it cleanup the coding style.

Fixes: ade887c633 ("drm/amdgpu/mes12: Use a separate fence per transaction")
Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-06-19 12:49:59 -04:00
Jack Xiao
fa10408116 drm/amdgpu/mes12: mes hw_fini fix for mode1 reset 
Port mes11 hw_fini to mes12, fix for mode1 reset.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-23 15:09:42 -04:00
Frank Min
b80160a53a drm/amdgpu/mes: use mc address for wptr in add queue packet 
use mc address for wptr in add queue packet

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-17 17:40:37 -04:00
shaoyunl
4488cd671c drm/amdgpu: enable unmapped doorbell handling basic mode on mes 12 
This reverts commit fcc5df722d.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-17 17:05:38 -04:00
Jack Xiao
745e0a90be drm/amdgpu/mes: fix mes12 to map legacy queue 
Adjust mes12 initialization sequence to fix mapping
legacy queue.

v2: use dev_err.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-13 15:44:20 -04:00
Alex Deucher
ade887c633 drm/amdgpu/mes12: Use a separate fence per transaction 
We can't use a shared fence location because each transaction
should be considered independently.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Alex Deucher
94b51a3d01 drm/amdgpu/mes12: increase mes submission timeout 
MES internally has a timeout allowance of 2 seconds.
Increase driver timeout to 3 seconds to be safe.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Alex Deucher
b1d852920b drm/amdgpu/mes12: print MES opcodes rather than numbers 
Makes it easier to review the logs when there are MES
errors.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:15 -04:00
Jack Xiao
03f4b8c3ca drm/amdgpu/mes12: disable logging output 
Random page fault was oberserved, temporarily disable
mes log buffer output.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Jack Xiao
ad5c0a79df drm/amdgpu/mes12: add legacy setting hw resource interface 
For unified mes fw, add the legacy interface to set hardware
resources.

v2: remove warning (Alex)

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
shaoyunl
fcc5df722d drm/amdgpu: Disable unmapped doorbell handling basic mode on mes 12 
The new mechanism for unmapped doorbell handling requires both driver side and
MES fw side change. The FW side changes are still not released.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Jack Xiao
4c2439f908 drm/amdgpu/mes12: add mes mapping legacy queue support 
Add mes12 map legacy queue packet submission.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jack Xiao
6ce03bd3a4 drm/amdgpu/mes12: enable uni_mes fw on mes pipe0 
Enable the unified mes firmware on mes pipe0.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jack Xiao
d2e2c9be78 drm/amdgpu/mes12: add uni_mes fw loading support 
Add the unified mes firmware loading support.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
shaoyunl
2f983d3ca5 drm/amdgpu: Enable event log on MES 12 
Enable event log through the HW specific FW API

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
shaoyunl
19e69a5d28 drm/amdgpu: Enable unmapped doorbell handling basic mode on mes 12 
Enable basic mode handling for doorbell ring on unmapped CP queue.
In this mode, MES can start schedule the queue mapping based on HW
interrupt instead of timer.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
Jack Xiao
4632bec9fa drm/amdgpu/mes12: update data cache boundary 
Enlarge the data cache boundary.

v2: use the fix data cache boundary.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Jonathan Kim
46c4766610 drm/amdgpu: fix trap enablement for gfx12 
Fix request to MES to set SQ_SHADER_TBA_HI.trap_en for GFX12.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
shaoyunl
d817c470cb drm/amdgpu: Enable MES to handle doorbell ring on unmapped queue 
On MES12, HW can monitor up to 2048 doorbells that not be
mapped currently and trigger the interrupt to MES when these unmapped
doorbell been ringed.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Jack Xiao
745f46b6a9 drm/amdgpu: enable mes v12 self test 
1. fix available compute queue to use
2. enable mes v12 self test

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Likun Gao
6628f7762b drm/amdgpu: set mes fw address for mes v12 
Split the function of mes fimrware address setting
from mes firmware load for mes v12, as it's also
needed for rlc autoload.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Jack Xiao
785f0f9fe7 drm/amdgpu: Add mes v12_0 ip block support (v4) 
v1: Add mes v12_0 ip block support. (Jack)
v2: Switch to gfx.kiq array. (Hawking)
v3: Switch to AMDGPU_GFXHUB(0). (Hawking)
v4: Rebase (Alex)

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00