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1005 Commits

Author SHA1 Message Date
Tasos Sahanidis
c6c4dd5401 drm/amdgpu/pptable: Fix UBSAN array-index-out-of-bounds 
Flexible arrays used [1] instead of []. Replace the former with the latter
to resolve multiple UBSAN warnings observed on boot with a BONAIRE card.

In addition, use the __counted_by attribute where possible to hint the
length of the arrays to the compiler and any sanitizers.

Signed-off-by: Tasos Sahanidis <tasos@tasossah.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-06-05 13:43:34 -04:00
Alex Deucher
05d9e24ddb drm/amdgpu: silence UBSAN warning 
Convert a variable sized array from [1] to [].

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-29 17:02:41 -04:00
Li Ma
e64e8f7c17 drm/amdgpu/atomfirmware: add intergrated info v2.3 table 
[Why]
The vram width value is 0.
Because the integratedsysteminfo table in VBIOS has updated to 2.3.

[How]
Driver needs a new intergrated info v2.3 table too.
Then the vram width value will be correct.

Signed-off-by: Li Ma <li.ma@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2024-05-22 12:01:39 -04:00
Jack Xiao
4b515127e8 drm/amdgpu/mes11: update ADD_QUEUE interface 
Update ADD_QUEUE interface for mes11 to support
mes mapping legacy queue.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-26 17:22:45 -04:00
Rodrigo Siqueira
5e66f6eaa2 drm/amd/display: Add some missing HDMI registers for DCN3x 
This commit add some missing HDMI control registers to DCN3x.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-26 17:22:42 -04:00
Rodrigo Siqueira
71dfa617ea drm/amd/display: Add missing debug registers for DCN2/3/3.1 
This commit add some missing debug registers for DPCS and RDPC debug.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-26 17:22:40 -04:00
Sunil Khatri
40356542c3 drm/amdgpu: add protype for print ip state 
Add the protoype for print ip state to be used
to print the registers in devcoredump during
a gpu reset.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-26 17:22:39 -04:00
Sunil Khatri
c395dbb68b drm/amdgpu: add support of gfx10 register dump 
Adding gfx10 gc registers to be used for register
dump via devcoredump during a gpu reset.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-26 17:22:39 -04:00
Sunil Khatri
e21d253bd7 drm/amdgpu: add prototype for ip dump 
Add the prototype to dump ip registers
for all ips of different asics and set
them to NULL for now. Based on the
requirement add a function pointer for
each of them.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-26 17:22:39 -04:00
Sunil Khatri
cba9b630f0 drm/amdgpu: add IH_RING1_CFG headers for IH v6.0 
Add offsets, mask and shift macros for IH v6.0
which are needed to configure ring1 client irq
redirection.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-18 23:46:31 -04:00
chongli2
f6ac084236 drm/amd/amdgpu: support MES command SET_HW_RESOURCE1 in sriov 
support MES command SET_HW_RESOURCE1 in sriov

Signed-off-by: chongli2 <chongli2@amd.com>
Reviewed-by: Jingwen Chen <Jingwen.Chen2@amd.com>
Acked-by: Jingwen Chen <Jingwen.Chen2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-09 22:08:53 -04:00
Ma Jun
b2207dc698 drm/amdgpu/pm: Add support for MACO flag checking 
Add support for MACO flag checking.
MACO mode only works if BACO is supported.

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-09 22:07:59 -04:00
Rodrigo Siqueira
be239684b1 drm/amd/display: Add missing registers 
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-09 22:06:16 -04:00
Rodrigo Siqueira
e7927b2914 drm/amd/display: Add some missing debug registers 
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-04-09 22:05:50 -04:00
Lang Yu
f3e698978c drm/amdgpu/umsch: update UMSCH 4.0 FW interface 
Align with FW changes.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-03-27 01:44:07 -04:00
Hawking Zhang
c9d7f802e6 drm/amdgpu: Add smuio v14_0_2 ip headers (v4) 
v1: Add smuio v14_0_2 register offset and shift masks
    header files. (Hawking)
v2: Update smuio v14_0_2 register offset and shift masks
    header files to RE2. (Likun)
v3: Update smuio v14_0_2 register offset and shift masks
    header files to RE2.5. (Likun)
v4: Clean up smuio v14_0_2 ip headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-03-20 13:38:16 -04:00
Rodrigo Siqueira
0ba7ad7e42 drm/amd/display: Add missing registers and offset 
[Why & How]
Registers and offset are missing. Add it back

Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-03-20 13:38:13 -04:00
Xiaojian Du
d1b2703cc2 drm/amdgpu: add the sensor value of VCN activity 
This will add the sensor value of VCN activity for some ASICs.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-03-20 13:37:37 -04:00
Tao Zhou
b7b23877a2 drm/amdgpu: add new bit definitions for GC 9.0 PROTECTION_FAULT_STATUS 
Add UCE and FED bit definitions.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-03-20 13:37:36 -04:00
Hawking Zhang
b9e9b8eaaf drm/amdgpu: Add pcie v6_1_0 ip headers (v5) 
v1: Add pcie v6_1_0 register offset and shift masks
    header files. (Hawking)
v2: Update pcie v6_1_0 register offset and shift masks
    header files to RE2. (Likun)
v3: Update pcie v6_1_0 register offset and shift masks
    header files to RE2.5. (Likun)
v4: Update pcie v6_1_0 register offset and shift masks
    header files to RE3. (Likun)
v5: Updates (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-03-07 15:32:38 -05:00
Hawking Zhang
d9b772420f drm/amdgpu: Add nbif v6_3_1 ip headers (v5) 
v1: Add nbif v6_3_1 register offset and shift masks
    header files. (Hawking)
v2: Update nbif v6_3_1 register offset and shift masks
    header files to RE2. (Likun)
v3: Update nbif v6_3_1 register offset and shift masks
    header files to RE2.5. (Likun)
v4: Update nbif v6_3_1 register offset and shift masks
    header files to RE3. (Likun)
v5: Updates (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-03-07 15:32:31 -05:00
Hamza Mahfooz
3a80fe500e drm/amd: add register headers for DCN351 
Add register headers for DCN 3.5.1.

Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-03-04 15:59:07 -05:00
Aurabindo Pillai
47136be638 drm/amd: Update atomfirmware.h for DCN401 
Add new firmware header definitions reqiured for DCN401

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-22 10:26:32 -05:00
Asad Kamal
86a08f1af2 Revert "drm/amdgpu: Add pci usage to nbio v7.9" 
Remove implementation to get pcie usage for nbio v7.9
as pcie usage is handled by fw

This reverts commit 59070fd9cc.

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-22 10:15:26 -05:00
Yifan Zhang
dc84f52eb2 drm/amdgpu/nbio: Add NBIO 7.11.1 Support 
Fix up doorbell setup and clockgating.

v2: squash in fixes (Alex)

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-16 15:42:03 -05:00
Hawking Zhang
f00c8157b6 drm/amdgpu: Add mp v14_0_2 ip headers (v5) 
v1: Add mp v14_0_2 register offset and shift masks
    header files. (Hawking)
v2: Update mp v14_0_2 register offset and shift masks
    header files to RE2. (Likun)
v3: Update mp v14_0_2 register offset and shift masks
    header files to RE2.5. (Likun)
v4: Update mp v14_0_2 register offset and shift masks
    header files to RE3. (Likun)
v5: Updates (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-14 17:15:41 -05:00
Hawking Zhang
5995a22f2e drm/amdgpu: Add vcn v5_0_0 ip headers (v5) 
v1: Add vcn v5_0_0 register offset and shift masks
    header files. (Hawking)
v2: Update vcn v5_0_0 register offset and shift masks
    header files to RE2. (Likun)
v3: Update vcn v5_0_0 register offset and shift masks
    header files to RE2.5. (Likun)
v4: Update vcn v5_0_0 register offset and shift masks
    header files to RE3. (Likun)
v5: Clean up vcn v5_0_0 ip headers. (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-12 16:10:05 -05:00
Hawking Zhang
5fb2f479b0 drm/amdgpu: Add hdp v7_0_0 ip headers (v3) 
v1: Add hdp v7_0_0 register offset and shift masks
    header files (Hawking)
v2: Update hdp v7_0_0 register offset and shift masks
    header files for RE2.5 (Likun)
v3: Clean up hdp v7_0_0 ip headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-12 16:09:50 -05:00
Saleemkhan Jamadar
0a119d53f7 drm/amdgpu/jpeg: add support for jpeg DPG mode 
Jpeg DPG support for GC IP v11_5_0

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-12 16:09:32 -05:00
Hawking Zhang
33c0c80ae5 drm/amdgpu: Add osssys v7_0_0 ip headers (v4) 
v1: Add osssys v7_0_0 register offset and shift masks
    header files. (Hawking)
v2: Update osssys v7_0_0 register offset and shift masks
    header files to RE2. (Likun)
v3: Update osssys v7_0_0 register offset and shift masks
    header files to RE2.5. (Likun)
v4: Clean up osssys v7_0_0 ip headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-12 16:09:06 -05:00
Hawking Zhang
f902bf5dd4 drm/amdgpu: Add lsdma v7_0_0 ip headers (v3) 
v1: Add lsdma v7_0_0 register offset and shift masks
    header files (Hawking)
v2: Update lsdma v7_0_0 register offset and shift masks
    header files for RE2.5 (Likun)
v3: Clean up lsdma v7_0_0 ip headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-12 16:08:34 -05:00
Hawking Zhang
0be41f31a9 drm/amdgpu: Add athub v4_1_0 ip headers (v5) 
v1: Add athub v4_1_0 register offset and shift masks
    header files. (Hawking)
v2: Update athub v4_1_0 register offset and shift masks
    header files to RE2. (Likun)
v3: Update athub v4_1_0 register offset and shift masks
    header files to RE2.5 (Likun)
v4: Update athub v4_1_0 register offset and shift masks
    header files to RE3. (Likun)
v5: Clean up athub v4_1_0 ip headers. (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-02-12 16:07:48 -05:00
Rodrigo Siqueira
b8e9a995fb drm/amd/include: Add missing registers/mask for DCN316 and 350 
Cc: Jun Lei <Jun.Lei@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Hamza Mahfooz <hamza.mahfooz@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-29 15:34:33 -05:00
Roman Li
85155f5b55 drm/amd: Add a DC debug mask for IPS 
For debugging IPS-related issues, expose a new debug mask
that allows to disable IPS.
Usage:
amdgpu.dcdebugmask=0x800

Signed-off-by: Roman Li <Roman.Li@amd.com>
Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-25 14:58:03 -05:00
Alex Deucher
4953be13be drm/amdgpu: convert some variable sized arrays to [] style 
Replace [1] with [].  Silences UBSAN warnings.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3107
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-25 14:49:07 -05:00
Alex Deucher
693d4e8861 drm/amdgpu/pptable: convert some variable sized arrays to [] style 
Replace [1] with [].  Silences UBSAN warnings.

Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/2039926
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-25 14:46:46 -05:00
Hawking Zhang
9bfb1a538a drm/amdgpu: Fix null pointer dereference 
amdgpu_reg_state_sysfs_fini could be invoked at the
time when asic_func is even not initialized, i.e.,
amdgpu_discovery_init fails for some reason.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-22 17:13:28 -05:00
chenxuebing
9c7fdfa396 drm/amd/include/vega20_ip_offset: Clean up errors in vega20_ip_offset.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line
ERROR: spaces required around that '=' (ctx:WxV)

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:36 -05:00
chenxuebing
296cce5d4e drm/amd/display: Clean up errors in renoir_ip_offset.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:33 -05:00
chenxuebing
70debdf217 drm/amd/amdgpu: Clean up errors in beige_goby_ip_offset.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:31 -05:00
chenxuebing
58479e2126 drm/amdgpu: Clean up errors in v10_structs.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:29 -05:00
chenxuebing
e1fe442fec drm/amd/include/navi14_ip_offset: Clean up errors in navi14_ip_offset.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:27 -05:00
chenxuebing
a0caeabb96 drm/amdgpu: Clean up errors in cgs_common.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line
ERROR: space required after that ',' (ctx:VxV)

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:25 -05:00
chenxuebing
aca4300ab2 drm/amd/include/sienna_cichlid_ip_offset: Clean up errors in sienna_cichlid_ip_offset.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:23 -05:00
chenxuebing
1ef4fd9278 drm/amd/include/vangogh_ip_offset: Clean up errors in vangogh_ip_offset.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:21 -05:00
chenxuebing
78a855f954 drm/amdgpu: Clean up errors in dimgrey_cavefish_ip_offset.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:19 -05:00
chenxuebing
eadf484e6b drm/amd/pp: Clean up errors in dm_pp_interface.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line
ERROR: space prohibited before that ',' (ctx:WxE)

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:17 -05:00
chenxuebing
882c82b9ac drm/amd: Clean up errors in vega10_ip_offset.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:15 -05:00
chenxuebing
3c642f34e9 drm/amd/include/vega10_ip_offset:Clean up errors in vega10_ip_offset.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following enum go on the same line

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:13 -05:00
chenxuebing
577fa1be30 drm/amdgpu: Clean up errors in kgd_pp_interface.h 
Fix the following errors reported by checkpatch:

ERROR: open brace '{' following enum go on the same line

Signed-off-by: chenxuebing <chenxb_99091@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-18 15:38:11 -05:00