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20 Commits

Author SHA1 Message Date
Shawn Guo
2feffa7519 arm64: dts: qcom: sm8150: fix number of pins in 'gpio-ranges' 
[ Upstream commit de3abdf3d1 ]

The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.

This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.

    pinctrl_gpio_set_config()
        pinctrl_get_device_gpio_range()
            pinctrl_match_gpio_range()

Fixes: e13c6d144f ("arm64: dts: qcom: sm8150: Add base dts file")
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-3-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
 2021-05-14 09:50:10 +02:00
Sibi Sankar
a6d435c1a6 arm64: dts: qcom: sm8150: Add OSM L3 interconnect provider 
Add Operation State Manager (OSM) L3 interconnect provider node on
SM8150 SoCs.

Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200801123049.32398-7-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-15 23:44:18 +00:00
Jonathan Marek
71a2fc6e7b arm64: dts: qcom: sm8150: add interconnect nodes 
Add the interconnect dts nodes for sm8150.

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200728023811.5607-7-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-09-15 23:43:21 +00:00
Jonathan Marek
f126991607 arm64: dts: qcom: use sm8150 gpucc dt-bindings 
Constants were used to allow merging separately from the dt-bindings,
switch to symbolic names now that dt-bindings have landed.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200818160445.14008-2-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-08-30 17:24:10 +00:00
Jonathan Marek
79493db5bb arm64: dts: qcom: sm8150: fix up primary USB nodes 
The compatible for hsphy has out of place indentation, and the assigned
clock rate for GCC_USB30_PRIM_MASTER_CLK is incorrect, the clock doesn't
support a rate of 150000000. Use a rate of 200000000 to match downstream.

Fixes: b33d2868e8 ("arm64: dts: qcom: sm8150: Add USB and PHY device nodes")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200818160445.14008-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-08-30 17:23:55 +00:00
Jonathan Marek
f30ac26def arm64: dts: qcom: add sm8150 GPU nodes 
This brings up the GPU. Tested on HDK855 by running vulkan CTS.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200709135251.643-14-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-07-27 23:27:03 -07:00
Jack Pham
b33d2868e8 arm64: dts: qcom: sm8150: Add USB and PHY device nodes 
Add device nodes for the USB3 controller, QMP SS PHY and
SNPS HS PHY.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Vinod Koul <vinod.koul@linaro.org>
Link: https://lore.kernel.org/r/1586566362-21450-3-git-send-email-wcheng@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-21 00:19:50 -07:00
Amit Kucheria
d2fa630cea arm64: dts: qcom: sm8150: Add thermal zones and throttling support 
sm8150 has 27 thermal sensors split across two tsens controllers. Add
the thermal zones to expose them and wireup the cpus to throttle their
frequencies on crossing passive temperature thresholds.

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/1cdbebe6f7f69ccd8468a4138b56e8a200289d95.1591684754.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-06-21 00:11:08 -07:00
Bjorn Andersson
d07706276b arm64: dts: qcom: sm8150: Hard code rpmhpd constants 
I missed the fact that these constants was not yet available, so hard
code their values in the dts to make the branch compile on its own.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-13 11:14:03 -08:00
Vinod Koul
c79ec8911e arm64: dts: qcom: sm8150: Fix UFS phy register size 
UFS phy register space size is 0x1c0. so update it

Reported-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200106070826.147064-3-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-05 23:33:55 -08:00
Sibi Sankar
fea8930bd5 arm64: dts: qcom: sm8150: Add cpufreq HW device node 
Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores
on SM8150 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191219120633.20723-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-19 16:41:56 -08:00
Sibi Sankar
49076351a2 arm64: dts: qcom: sm8150: Add ADSP, CDSP, MPSS and SLPI remoteprocs 
Add ADSP, CDSP, MPSS and SLPI device tree nodes for SM8150 SoC.

Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191217092503.10699-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-17 22:18:58 -08:00
Sibi Sankar
61025b815e arm64: dts: qcom: sm8150: Add ADSP, CDSP, MPSS and SLPI smp2p 
Add the SMP2P nodes for the remoteproc states for ADSP, CDSP, MPSS and
SLPI remoteprocs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/0101016e80793dfa-9d0f6e93-01db-4c95-a226-d64bb50238cb-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-16 15:45:57 -08:00
Sibi Sankar
017e7856ed arm64: dts: sm8150: Add rpmh power-domain node 
Add the DT node for the rpmhpd power controller.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/0101016e7f99eab9-35efa01f-8ed3-4a77-87e1-09c381173121-000000@us-west-2.amazonses.com
[bjorn: Use constant for opp6, until include lands]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-11 23:33:46 -08:00
Vinod Koul
3834a2e922 arm64: dts: qcom: sm8150: Add ufs nodes 
Add the ufs hc node and ufs phy nodes found in SM8150

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084656.1749954-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-10 23:34:14 -08:00
Vinod Koul
d6f55763c7 arm64: dts: qcom: Use gcc clock enums 
Now that header defining gcc clocks is upstream, use the enums instead
of numbers

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084604.1746544-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-10 23:28:58 -08:00
Sai Prakash Ranjan
fb2d815006 arm64: dts: qcom: sm8150: Add APSS watchdog node 
Add APSS (Application Processor Subsystem) watchdog
DT node for SM8150 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3393092-487ddf4a-2e17-40f0-8161-3e686a7b57dc-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-10 22:51:13 -08:00
Vinod Koul
d8cf9372b6 arm64: dts: qcom: sm8150: Add apps shared nodes 
Add hwlock, pmu, smem, tcsr_mutex_regs, apss_shared mailbox, apps_rsc
including the rpmhcc child nodes to the SM8150 DTSI

Co-developed-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-08-21 15:24:42 -07:00
Vinod Koul
912c373a76 arm64: dts: qcom: sm8150: Add reserved-memory regions 
Add the reserved memory regions in SM8150

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-08-21 15:24:40 -07:00
Vinod Koul
e13c6d144f arm64: dts: qcom: sm8150: Add base dts file 
This add base DTS file with cpu, psci, firmware, clock node tlmm and
spmi and enables boot to console

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-08-21 15:24:18 -07:00